Adaptive equalization technique using twice sampled non-return t

Details Adaptive equalization technique using twice sampled non-return t Adaptive equalization technique using twice sampled non-return t

1997-10-06

2000-04-25

Chin, Stephen

Pulse or digital communications

Equalizers

Automatic

375233, 333 18, 333 28, H03K 5159, H03G 1104, H03H 500

Patent

active

060552697

ABSTRACT:
A method and apparatus for providing equalization for a communication channel is provided. The invention uses edge transition samples, such as those obtained for phase detection in a phase locked loop (PLL) circuit, to determine the amount of equalization to be applied to signals received from a communication channel. By monitoring run lengths of consecutive identical bits received from the communication channel, the invention provides equalization for various frequency components present in the receive signal. One embodiment of the invention subtracts a weighted RC-filtered version of the receive signal from the unfiltered receive signal to provide an equalized receive signal. In this embodiment, a control circuit that monitors the received run lengths and edge transition information adjusts the resistance of the RC filter to adapt the equalization to the data being received and the potentially time varying conditions for the communication channel. Other embodiments of the invention use an analog finite impulse response filter, digital finite impulse response filter, analog decision feedback equalizer, digital decision feedback equalizer, analog forward feedback equalizer, or digital forward feedback equalizer to provide equalization based on the same information.

REFERENCES:
patent: 5132926 (1992-07-01), MacEachern et al.
patent: 5604741 (1997-02-01), Samueli et al.
patent: 5692020 (1997-11-01), Robbins
M. Simon, et al., "Digital Commmunication Techniques, Signal Design and Detection," Prentice Hall, 1995, pp. 600-613.
D. A. Johns, D. Essig, "Integrated Circuits for Data Transmission Over Twisted-Pair Channels," IEEE J. Solid-State Circuits, vol. 21, Mar. 1997, pp. 398-406.
Joshua C. Park, et al., "High-Speed Continuous-Time Analog Complex Graphic Equalizer for Magnetic Recording Read Channels," IEEE 1997 Custom Integrated Circuits Conference, pp. 5-8.
James S. Ignowski, et al., "A CMOS Analog Adaptive Equalizer for a DDS3 Tape Drive PRML Read Channel," IEEE 1997 Custom Integrated Circuits Conference, pp. 9-12.
J. Routama, et al., "A Transmitter and Receiver Interface Circuit Including an Equalizer and PFLL for 150Mbit/s Cable Communication," IEEE 1997 Custom Integrated Circuits Conference, pp. 315-318.

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