Adaptive divider control for a phase lock loop circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Patent

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Details

327115, 327117, 327147, H03L 708

Patent

active

060844485

ABSTRACT:
A phase lock loop circuit comprising a reference frequency divider, wherein the divisor increases until the desired operating frequency is reached. The input frequency is delivered to a summing circuit that sums the input frequency with an output frequency. The resultant frequency is delivered to a phase comparator, which generates an error voltage. The error voltage is used to drive a voltage-controlled oscillator to generate an output frequency. A divisor in the voltage-controlled oscillator increases synchronously with the reference frequency divider until the desired operating frequency is reached.

REFERENCES:
patent: 5038117 (1991-08-01), Miller
patent: 5140284 (1992-08-01), Petersson et al.
patent: 5351014 (1994-09-01), Ichiyoshi
patent: 5861766 (1999-01-01), Baumer et al.

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