Adaptive digital symbol recovery for amplitude phased keyed digi

Pulse or digital communications – Equalizers – Automatic

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Details

375261, 375326, 375322, H03H 730, H04L 2302

Patent

active

058987371

ABSTRACT:
Improvements to amplitude phased keyed digital communications systems and to the processing of amplitude phase keyed symbols transmitted over radio frequency channels. The present invention provides for an amplitude phased keyed digital communications system including an adaptive baseband equalizer, a digital symbol recovery circuit in accordance with the present invention, and a quadrature demodulator. The adaptive baseband equalizer receives amplitude phased keyed signals and outputs in-phase and quadrature digital amplitude values corresponding to the received amplitude phased keyed signals. The digital symbol recovery circuit comprises a programmable addressable random access memory that stores a plurality of eight bit words comprising decoded symbol sets of the received amplitude phased keyed signals, and outputs the decoded symbol sets in response to addresses corresponding to the in-phase and quadrature output signals. The quadrature demodulator processes the decoded symbol sets and outputs recovered amplitude phased keyed symbols corresponding to the received amplitude phased keyed signals. Eight bit I and Q amplitude values address 256.times.256 memory locations in the memory of the digital symbol recovery circuit. For example, at each memory location, a seven bit word, for example, is stored. The first four bits define a 4-tuple for the decoded symbol. The fifth bit is a bang-bang phase bit or carrier tracking bit. The sixth bit is a bang-bang automatic gain control bit. The seventh bit is a false lock indicator bit.

REFERENCES:
patent: 5264937 (1993-11-01), Christopher
patent: 5315617 (1994-05-01), Guida et al.
patent: 5347569 (1994-09-01), Yamamoto
patent: 5563916 (1996-10-01), Scarpa
patent: 5671253 (1997-09-01), Stewart

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