Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2003-08-19
2004-08-17
JeanPierre, Peguy (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S110000, C341S111000, C375S269000
Reexamination Certificate
active
06778112
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the priority benefit of Taiwan application serial No. 92114224, filed on May 27, 2003.
BACKGROUND OF INVENTION
1. Field of the Invention
This invention generally relates to an adaptive decoding method for frequency shift key (“FSK”) signals, and more particularly to an adaptive decoding method and apparatus for frequency shift key signals.
2. Description of Related Art
Frequency shift key (“FSK”) is a modulation scheme typically used to send digital information between digital equipment such as teleprinters and computers. The data are transmitted by shifting the frequency of a continuous carrier in a binary manner to one or the other of two discrete frequencies. One frequency is designated as the “mark” frequency and the other as the “space” frequency. The mark and space correspond to binary one and zero, respectively.
FSK also has been used for Caller ID service. For example, there are two specifications providing Caller ID capability: TIA/EIA-716 and Bellcore. Both specifications adopt FSK to transmit data. For example, 1200 Hz corresponds to binary one; 2200 Hz corresponds to binary zero.
FIG. 1
is a block diagram of a conventional FSK decoder. It includes an A/D converter
110
, a sinusoidal wave filter
115
, and a secondary filter
120
, a comparison filter
125
, and a decoding device
130
.
A/D converter
110
converts the analog signals to digital signals at 1.536 MHz. These digital signals will be converted to sinusoidal wave signals at 48 kHz via the sinusoidal wave filter
115
. Then the secondary filter
120
filters out signals beyond 200 Hz 3200 kHz according to Bellcore specification. The comparison filter
125
then determines the filtered signals from the secondary filter
120
as binary one or binary zero. According to the Bellcore specification, the baud rate is 1200 and the signal frequency is 48 kHz. Hence, there are 40 samples for a FSK symbol. According to the Bellcore specification, 1200 Hz is designated as binary one; 2200 Hz is designated as binary zero.
FIGS. 2A-B
, show the impulse response of binary one or binary zero signal, respectively. In
FIG. 2A
, after sampling, there are 20 samples at high voltage level and 20 samples at low voltage level in order. In
FIG. 2B
, there are 11 samples at high voltage level, 11 samples at low voltage level, 11 samples at high voltage level, and 7 samples at low voltage level in that order. Hence, the comparison filter
125
can determine the signals as binary one or binary zero.
The above description assumes that the channel is perfect. In reality, the FSK signals transmitted from telephone exchange are attenuated to change the frequency, the baud rate, and the amplitude twist of the signals.
According to the Bellcore specification, it allows ±1% variance for the frequency and the baud rate of the FSK signals and ±10 dB variance for the amplitude twist of the FSK signals.
Furthermore, for simplification, the secondary filter
120
is generally an infinite impulse response (“IIR”) filter. However, IIR filter cannot have exactly linear phase (constant group delay) and thus causes signal distortion, signal shifting, and noises.
SUMMARY OF INVENTION
An object of the present invention is to improve the conventional FSK decoder and to provide an adaptive FSK decoding method and apparatus to automatically determine the central point of the FSK symbol and its baud rate thereby decoding the correct data even if the frequency, the baud rate, and the amplitude twist have been changed.
The present invention provides an adaptive frequency shift key decoding method, comprising: sampling a demodulated frequency shift key signal at a predetermined sampling rate to obtain a plurality of sample points; inputting the values of said plurality of sample points in sequence to a sample group; comparing the values of at least a pair of said plurality of sample points, the pair of said plurality of sample points being symmetrical to a central point of the sample group; obtaining a sample correcting number when the value of the pair of said plurality of sample points are different; comparing a central value with the value of one of the pair of said plurality of sample points when the values of the pair of said plurality of sample points are different, to obtain a sample correcting direction; and selecting the desired sample points from said plurality of sample points responsive to the sample correcting number and the sample correcting direction; wherein the central value is the value of any sample point within predetermined points of the central point.
In a preferred embodiment of the present invention, the step to obtain a sample correcting direction further comprises: (a) determining the sample correcting direction as backward (a-1) when the value of the first sample point of the pair of said plurality of sample points is different from the central value, wherein the first sample point is before the central point; (a-2)when the value of the second sample point of the pair of said plurality of sample points is the same as the central value, wherein the second sample point is after the central point; (b) determining the sample correcting direction as forward (b.1) when the value of the first sample point is the same as the central value; (b.2) when the value of the second sample point is different from the central value.
The present invention also provide an apparatus for adaptively decoding frequency shift key signals, comprising a buffer for receiving a plurality of sample points by sampling a demodulated frequency shift key signal at a predetermined sampling rate; a shift register, coupled to the buffer, for storing the output of the buffer; decoding means, coupled to the buffer and the shift register, for comparing the value of a pair of said plurality of sample points, the pair of said plurality of sample points being symmetrical to a central point of the sample group, the decoding means outputting a shift control signal and a sample point control signal by comparing a central value with the value of one of the pair of said plurality of sample points when the values of the pair of said plurality of sample points are different; and a multiplexer, coupled to the shift register and the decoding means, for selecting the desired sample points from said plurality of sample points responsive to the sample point control signal; wherein the central value is the value of any sample within a predetermined points of the central point, and the buffer changes the amount of sample points responsive to the shift control signal.
Accordingly, the present invention can adapt to the shift of the sample points and the change of the baud rate to obtain the correct sample points.
The above is a brief description of some deficiencies in the prior art and advantages of the present invention. Other features, advantages and embodiments of the invention will be apparent to those skilled in the art from the following description, accompanying drawings and appended claims.
REFERENCES:
patent: 5475307 (1995-12-01), Silvian
patent: 6226325 (2001-05-01), Nakamura
patent: 6445246 (2002-09-01), Yoshida
Jean-Pierre Peguy
Jiang Chyun IP Office
Winbond Electronics Corp.
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