Adaptive computing ensemble microprocessor architecture

Details Adaptive computing ensemble microprocessor architecture Adaptive computing ensemble microprocessor architecture

2008-06-17

2008-06-17

Coleman, Eric (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Array processor

Reexamination Certificate

active

07389403

ABSTRACT:
An Adaptive Computing Ensemble (ACE) includes a plurality of flexible computation units as well as an execution controller to allocate the units to Computing Ensembles (CEs) and to assign threads to the CEs. The units may be any combination of ACE-enabled units, including instruction fetch and decode units, integer execution and pipeline control units, floating-point execution units, segmentation units, special-purpose units, reconfigurable units, and memory units. Some of the units may be replicated, e.g. there may be a plurality of integer execution and pipeline control units. Some of the units may be present in a plurality of implementations, varying by performance, power usage, or both. The execution controller dynamically alters the allocation of units to threads in response to changing performance and power consumption observed behaviors and requirements. The execution controller also dynamically alters performance and power characteristics of the ACE-enabled units, according to the observed behaviors and requirements.

REFERENCES:
patent: 6079008 (2000-06-01), Clery, III
patent: 6092153 (2000-07-01), Lass
patent: 6745318 (2004-06-01), Mansingh
patent: 6748556 (2004-06-01), Storino et al.
patent: 7020800 (2006-03-01), Fu et al.
patent: 7035997 (2006-04-01), Musoll et al.
patent: 7035998 (2006-04-01), Nemirovsky et al.
patent: 7093109 (2006-08-01), Davis et al.
patent: 7155600 (2006-12-01), Burky et al.
patent: 2004/0216102 (2004-10-01), Floyd
patent: 2004/0216104 (2004-10-01), Fluhr et al.
patent: 2005/0125629 (2005-06-01), Kissell
patent: 2005/0132238 (2005-06-01), Nanja
patent: 2005/0182915 (2005-08-01), Devaney et al.
patent: 2006/0248317 (2006-11-01), Vorbach
Khailany,B etal Imagine; Media Processing With Streams, 2001, IEEE.
Khailany, Brucek, et al., Imagine: Media Processing With Streams, 2001, IEEE, pp. 35-46.
Excel Spreadsheet of Dec. 16, 2007 identifying references used to reject claims in related applications.

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