Electric power conversion systems – Current conversion – With means to introduce or eliminate frequency components
Reexamination Certificate
2002-07-12
2003-03-18
Vu, Bao Q. (Department: 2838)
Electric power conversion systems
Current conversion
With means to introduce or eliminate frequency components
C363S134000
Reexamination Certificate
active
06535402
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an apparatus and a method for compensating the voltage error caused by dead time of switching elements which are used in electronic appliances such as converters, inverters or motors, and more particularly to an apparatus and a method for compensating the voltage error and the output current distortion caused by dead time of switching elements in a PWM converter or PWM inverter.
BACKGROUND OF THE INVENTION
FIG. 1
illustrates a circuit configuration of an inverter which is constituted by semiconductor switching elements. More specially, the inverter is formed by phase bridges which are constituted by series-connecting one switching element in parallel with a reverse recovery diode and another switching element in parallel with another reverse recovery diode. The load is connected to the node of the series connection which defines the output terminal of the inverter.
It is well known that a typical semiconductor switching element has an intrinsic delay time interval from the receipt of an on or off gate drive signal to the starting up of its switching action. The action of the switching element is turning on normally faster than turning off. Also, the duration of action of a gate drive circuit depends on its characteristics. Accordingly, if one of the two switching elements in the upper or lower arm of a phase bridge is turned off and the other switching element is turned on without giving a delay simultaneously, a short circuit may be produced. To prevent the short circuit of the power supply in pulse width modulated (PWM) voltage inverters or converters, the gate drive signal is preset with a dead time which is determined under the consideration of differences between the delays that are intrinsic to the elements and circuits. Therefore, the dead time is necessary to prevent the short circuit of the power supply in pulse width modulated (PWM) voltage inverters or converters resulting in output deviations. Although individually small, when accumulated over an operating cycle, the voltage deviations are sufficient to distort the applied PWM signal.
Actually, the dead time causes an error voltage between the command voltage and the actual output voltage, thereby resulting in disadvantages such as current distortion and torque ripple. For simplicity, the effects of dead time can best be examined from one phase of an inverter, e.g. phase U.
Referring to
FIGS. 1 and 2
, PWM
u
is the PWM command signal without the dead time. PWM
1
and PWM
4
are the actual gate driver signals of switching elements T
1
and T
4
with the dead time T
d
inserted respectively. The inverter output voltage U
UO
is the voltage of U-phase output with reference to the neutral ‘O’ which is an imaginary mid-point of the DC bus. The positive direction of phase currents is defined in
FIGS. 1 and 2
. Assuming i
u
>0, after PWM
1
resets, in the period of dead time, both T
1
and T
4
are non-conductive. However, due to the inductive load, the output current is continuous. It then flows through the freewheeling diode D
4
and the negative DC bus voltage is connected to the output. So the terminal U has substantially the same potential as the negative terminal of the DC bus. Likewise, when the output current i
u
is flowing into the inverter, i.e. i
u
<0, after PWM4 resets, in the period of dead time, the output current flows through the freewheeling diode D
1
and the terminal presents the positive voltage. It can be thus known that the output voltage is determined by the direction of the output current rather than the control signals of the switching elements during the dead time period.
The U
error
, as shown in
FIG. 2
, illustrates these resultant deviation voltage pulses caused by the dead time. Assuming the switching elements are ideal, that is, both voltage drop and switching times are neglected, all these deviation pulses have the same height of U
d
and the same width of T
d
. These deviation voltage pulses due to dead time are opposite to the current in either direction. As a result, the output current magnitude is reduced, regardless of its polarity.
Many industrial approaches for compensating this inevitable dead time have been suggested in PWM techniques. Most of them are based on the average value theory in which the error is averaged over an operating cycle and then added to a command voltage. Contrarily, the pulse based consideration in the dead time compensation method is also suited. Those pulsed-based methods provide more accurate compensation but increase the burden of the processor.
A conventional dead time compensation method will be described with reference to FIG.
3
.
FIG. 3
shows a flowchart for calculating a compensating voltage V
comp
so as to compensate the deviation voltage in accordance with the dead time. A current detector detects (Step S1) the output current i
u
and the controller judges (Step S2) the polarity of the detected current i
u
. Here, if the value of the detected current is positive, a compensating voltage V
comp
for compensating the voltage error according to dead time is set as a predetermined positive value (Step S3). If the value of the detected current remains negative, the compensation voltage V
comp
is set (step S4) as a predetermined negative value. Next, by adding the compensation voltage V
comp
to a command voltage V
cmd
, there is obtained (Step S5) a new compensation voltage V′
cmd
.
Whereas, when the polarity of the current i
u
is judged as negative, the command voltage V′
cmd
is obtained by subtracting the dead time compensating voltage V
comp
of the inverter. When the polarity of the current i
u
is judged as positive, the command voltage V′
cmd
is obtained by adding the dead time compensating voltage V
comp
of the inverter.
However, as the current magnitude is small around current zero crossing point (ZCP), the noise and the transient caused by the PWM signal are added onto the little current signal. This makes it difficult for the current detector to detect current direction precisely, and the dead time compensation voltage is not in step with the actual current direction. As a result, the current distortion becomes worse.
As aforementioned, the dead time effects are analyzed on the assumption that the delay time of the switching elements is neglected. This assumption is reasonable when the output current is large but not the case that the output current is small especially around ZCP.
FIG. 4
illustrates the effect of turning off time of switching elements on the output voltage, where part a) is the ideal PWM signal without dead time inserted, and part b) and c) are the actual PWM signal with the dead time inserted corresponding to the upper and lower switching elements respectively. T
d
means the inserted dead time. The bold solid line in part d) presents the case of the high positive output current, and the dashed line presents the case of the low positive output current. For the high positive current, the induction of motor quickly drives U
uo
to a low voltage during the dead time interval. However for a low positive current, during the dead time interval, the inductance of the motor has difficulty to reduce U
uo
due to the interaction with the large T
off
as well as the parasitic inductance and the capacitance of the system. Thus the high voltage U
uo
decays slowly during the dead time interval. Consequently, the above foresaid deviation voltage pulses come to be shortened. As a result, the voltage error caused by the dead time is lightened, and in another word, the dead time is partly compensated automatically. When the positive current is small enough, U
uo
may come to its utmost which is illustrated as the highest dashed line in part d) and the above foresaid deviation voltage pulses will be zero. As a result, the width of the output voltage U
uo
equals to that of the ideal command PWM which is clearly illustrated in parts a) and d) T
a
=T
b
. This means that dead time is fully compensated automatically. Likewise for a negative curre
Wang Jin
Wu Zhigan
Ying Jianping
Delta Electronics , Inc.
Vu Bao Q.
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