Adaptive clocking mechanism for digital video decoder

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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Details

C348S537000

Reexamination Certificate

active

10656031

ABSTRACT:
An adaptive clocking mechanism is provided for a digital display system. The digital display system includes a clock recovery system, for recovering a system time clock from a video bit-stream generated at an encoder, and a decoding system for decoding and decompressing the video bit-stream at a frame rate. The adaptive clocking mechanism operates to determine, from video format information transmitted from the encoder, the occurrence of a frame rate at which a transmitted signal is encoded that differs from a frame rate expected by the decoder. Upon such a determination, the adaptive clocking mechanism further operates to select a modifier from a group of modifiers based on format information derived from the video bit stream, including the encoded frame rate. The selected modifier is then applied to a synchronization function of the decoder in a manner to bring the decoder operation into synchronization with the non-expected encoder frame rate.

REFERENCES:
patent: 4683469 (1987-07-01), Elsmore et al.
patent: 6028641 (2000-02-01), Kim
patent: 6177922 (2001-01-01), Schiefer et al.
patent: 6661846 (2003-12-01), Ota

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