Adaptive clock recovery apparatus for supporting multiple bit tr

Details Adaptive clock recovery apparatus for supporting multiple bit tr Adaptive clock recovery apparatus for supporting multiple bit tr

1996-11-20

1998-09-01

Tse, Young T.

Pulse or digital communications

Synchronizers

348537, H04L 700

Patent

active

058021191

ABSTRACT:
An adaptive clock recovery apparatus. The adaptive clock recovery apparatus comprises a clock switching unit for switching a sample clock to be input from outside according to an adaptive clock controlling signal; a sample counting unit for inputting both a reset signal from the outside and an output from the clock switching unit, and outputting sample data by an operation depending upon a buffer state signal; an adaptive clock controlling unit for inputting the sample clock, the buffer state signal, the reset signal, and the sample data from the sample counting unit, and outputting the adaptive clock controlling signal to the clock switching unit; a reception frequency processing unit for inputting reception frequency from outside, and outputting frequency set up data; an adaptive clock generating unit for inputting both the frequency set up data from the reception frequency processing unit and the adaptive clock controlling signal from the adaptive clock controlling unit, and outputting the adaptive clock to the outside; and a buffering unit for outputting image data input from outside to the outside according to the adaptive clock of the adaptive clock generating unit, and also outputting the buffer state signal to the adaptive clock controlling unit and the sample counting unit, respectively.

REFERENCES:
patent: 4713691 (1987-12-01), Tanaka et al.
patent: 4847678 (1989-07-01), McCauley
patent: 5260978 (1993-11-01), Fleischer et al.
patent: 5473385 (1995-12-01), Leske
patent: 5537055 (1996-07-01), Smith et al.
patent: 5633688 (1997-05-01), Choi et al.
patent: 5657089 (1997-08-01), Onagawa
Adaptive Clock Synchronization Schemes for Real-Time Traffic in Broadband Packet Networks; R.P. Singh and S.H. Lee; 1988; pp. 84-88.
Synchronous Techniques for Timing Recovery in BISDN; Richard C. Lau and Paul E. Fleischer; 1995; pp. 1810-1818.

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