Adaptive clock generation with pseudo random variation

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Frequency or repetition rate conversion or control

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327164, 327145, 395550, 395650, H03K 384

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054164346

ABSTRACT:
Adaptive clock generator including a master clock. A control means detects the current operating mode and, in response, provides a corresponding integer output N. A programmable pulse generator provides an output clock signal comprising a "high" pulse having a predetermined width followed by a "low" pulse having a width of N master clock periods. A dithered clock signal may be provided when the control means provides an integer output N selected from a set of integer values. Preferably, N is selected in a random or pseudo-random manner.

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patent: 5263172 (1993-11-01), Olnowich
"Embedded Microcontrollers and Processors", vol. II, pp. 24-59, 24-99, Intel, order #270354-005, Oct. 1991.

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