Adaptive blind start-up receiver architecture with...

Details Adaptive blind start-up receiver architecture with... Adaptive blind start-up receiver architecture with...

2005-05-12

2008-11-04

Ghayour, Mohammad (Department: 2611)

Pulse or digital communications

Equalizers

Automatic

C375S233000, C375S326000, C375S344000, C375S346000

Reexamination Certificate

active

07447262

ABSTRACT:
This invention presents a novel receiver architecture for full-duplex multi-level PAM systems. The receiver employs an Analog-to-Digital Converter (ADC) that has a sample rate flexibly specified as (Ns+1)/Nsbaud rate where Nsis an integer equal or greater than 1. A fractional-spaced echo canceller is used to cancel the echo at the ADC output. The use of a fractional sampling rate higher than the baud rate also enables the timing recovery function be implemented in the digital domain and hence eliminates the need of using the complex analog phase selection circuit. The receiver is also capable of fast, blind start-up by use of a decision feedback equalizer with unity main tap and a soft level slicer. The timing phase can be optimally located using a derivative channel estimator. Once the “eye-open” condition is achieved, the channel equalization is switched to the use of linear equalizer coupled with an error feedback equalizer to alleviate the error propagation problem associated with the decision feedback equalizer.

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