Adaptive analog equalizer

Details Adaptive analog equalizer Adaptive analog equalizer

2002-02-21

2004-06-01

Nguyen, Patricia (Department: 2817)

Wave transmission lines and networks

Coupling networks

Equalizers

C333S018000

Reexamination Certificate

active

06744330

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to analog equalization; and, more particularly, it relates to adaptive analog equalization
RELATED ART
Existing technologies for analog equalization commonly utilize the shape of a signal pulse to drive equalization adaptation for countering the undesirable channel attenuation and distortion. These conventional techniques are effective for most “return-to-zero” AMI line codes, but for DS3 or E3 line code applications, the pulse mask is spread to the point that it can essentially be considered non-return-to-zero within the bit period. In this case, it is difficult to train the equalizer when starting from either an over-equalized condition or an under-equalized condition.
Existing analog equalization techniques commonly trigger on the rising edge of a pulse and then sample the signal some time later at the falling edge where the sampled value is expected to be close to zero. The later sampling is typically about ¾ of a symbol period later. The sampled value is an indication of the degree of over-equalization or under-equalization. This indication is used as the error term in the equalizer feedback control loop.
FIG. 1A
is a system diagram illustrating an idealized adaptive analog equalization system
100
A. The system in
FIG. 1A
is illustrative of the situation where equalization is performed at the receive end of a communication channel, somehow trying to compensate for the deleterious effects of intersymbol interference within the communication channel. An input signal
110
A is passed through a communication channel
130
A having a transfer function shown as H(s). The communication channel
130
A is terminated by an equalizer
142
A having a transfer function [~1/H(s)] that is, ideally, the inverse of the transfer function of the communication channel
130
A. The output signal
112
A is, ideally, an exact duplicate of the input signal
110
A.
Many conventional equalization systems operate using digital correction techniques. While these digital techniques are amenable to many applications, they are simply insufficient for very high frequency applications. As the operational frequencies continue to increase within various communication systems, the conventional digital correction techniques need similarly to increase in terms of operational frequency.
Further limitations and disadvantages of conventional and traditional systems will become apparent to one of skill in the art through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.
SUMMARY OF THE INVENTION
The present invention provides an adaptive analog equalizer that operates on a received input signal. The adaptive analog equalizer includes a high pass network and a multiplier that has an adjustable gain. The high pass network and the multiplier have a frequency response that, when adaptively applied to the input signal, are operable to compensate for corruption in the input signal. The output signal from the adaptive analog equalizer is used to drive the gain control through a feedback loop to adjust the adjustable gain of the multiplier. The received input signal is modified by the high pass network and the multiplier and is then summed up with itself.
In one embodiment of the invention, the received input signal is a channel corrupted input signal. However, the adaptive analog equalizer is operable on the input signal when there is no corruption in the input signal as well without any additional complexity. When the input signal is provided from a communication channel, the frequency response of the adaptive analog equalizer is adapted to be substantially an inverse of the frequency response of the channel. The gain control performs decision and sampling control of the output signal from the adaptive analog equalizer, and feeds it back to the multiplier of the adaptive analog equalizer through an integrator. The adaptive analog equalizer requires variable gain amplification, to be performed on its input signal. The variable gain amplifier in conjunction with an integrator, and a peak detector is employed for this purpose. The output signal from the adaptive analog equalizer is processed through the peak detector and the integrator to provide a feedback control signal for the variable gain amplifier. The decision and sampling control block in the gain control circuit is operable to perform double sampling of its input signal. The decision and sampling control circuit waits a first predetermined period of time after pulse rising edge detection before sampling a first sample of the input signal. In addition, it waits a second predetermined period of time after pulse rising edge detection before sampling a second sample of the input signal.
Other features of the present invention can be found in a double sampling adaptive analog equalizer. The double sampling adaptive analog equalizer includes a decision and sampling control block inside a gain control unit that is operable to perform double sampling of an input signal. The gain-control processed feedback loop forces the input signal to a predetermined value within ¾
th
of a bit period after detecting a rising edge. The predetermined value to which the input signal is forced is zero.
In some embodiments of the invention, the decision and sampling control waits a first predetermined period of time before sampling a first sample of its input signal. In one embodiment, the first predetermined period of time is less than a pulse period. In addition, the decision and sampling control waits a second predetermined period of time before sampling a second sample of the input signal. In one embodiment, the second predetermined period of time is greater than a pulse period.
The adaptive analog equalizer structure of the present invention also includes a high pass network and a multiplier having an adjustable gain. The input signal is provided from a communication channel having a channel frequency response, and a frequency response of the high pass network and the multiplier is substantially an inverse of the channel frequency response.
Other aspects of the present invention can be found in a method to perform analog adaptive equalization. The method involves detecting a rising edge of an input signal, waiting a first predetermined period of time before sampling a first sample of the input signal, waiting a second predetermined period of time before sampling a second sample of the input signal, and adjusting a gain of a multiplier when the second sample does not exceed a predetermined threshold.
In some embodiments of the invention, the first predetermined period of time is less than a pulse period. The second predetermined period of time is greater than a pulse period. The input signal is a channel corrupted input signal. The method also involves forcing the input signal to zero within ¾
th
of a bit period in response to a one to zero transition.
Other systems, methods, features and advantages of the invention will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims.


REFERENCES:
patent: 4669092 (1987-05-01), Sari et al.
patent: 5734680 (1998-03-01), Moore et al.
patent: 5880645 (1999-03-01), Everitt et al.
patent: 5903605 (1999-05-01), Crittenden
patent: 5940442 (1999-08-01), Wong et al.
patent: 5943368 (1999-08-01), Bergmans et al.

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