Adaptive active bias compensation technique for power...

Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement

Reexamination Certificate

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C330S285000, C330S136000

Reexamination Certificate

active

06891438

ABSTRACT:
A power amplifier circuit (10) for a TDMA transmitter. The amplifier circuit (10) includes an FET amplifier (14), a current sensing resistor (24) that senses the quiescent drain current of the FET amplifier (14), and a switch (26) coupled across the sensing resistor (24). When data transmission bursts are being amplified by the amplifier circuit (10), a switch signal closes the switch (26) to bypass the sensing resistor (24) so that it does not dissipate power and reduce the efficiency of the amplifier circuit (10). When the data transmission is between data bursts, the switch signal opens the switch (26) to allow a voltage drop across the sensing resistor (24). The voltage drop is measured to determine the quiescent drain current of the FET amplifier (14) to maintain the drain current at the desirable operating point.

REFERENCES:
patent: 4755741 (1988-07-01), Nelson
patent: 4857861 (1989-08-01), Seevinck et al.
patent: 5982236 (1999-11-01), Ishikawa et al.
patent: 6025754 (2000-02-01), Czora
patent: 6614309 (2003-09-01), Pehlke

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