Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Patent
1999-02-17
2000-09-12
Leja, Ronald W.
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
H02H 900
Patent
active
061186406
ABSTRACT:
An electro-static-discharge (ESD) protection circuit protects internal power supplies in a mixed-signal IC. An active protection circuit is used. The ESD-protection circuit uses standard transistors and is actively enabled and disabled by standard transistors. A standard thin-oxide NMOS transistor is the ESD switch (shunt) between power supply busses. This thin-oxide transistor ESD switch is actively enabled and disabled by a control circuit. NMOS transistors in the control circuit discharge the gate node of the ESD switch when the power supplies are powered up, thus actively disabling the ESD protection circuit. When an ESD pulse is applied to a supply when powered down, a capacitor couples the rapid voltage rise to the gate node. The rising voltage turns on the ESD switch, shunting the ESD pulse to the other supply. A resistor and a p-channel MOS transistor in series then discharge the gate node to the other supply. The capacitor, resistor, and p-channel transistor form an RC network. A second RC network is connected to the other supply so that symmetric protection is provided. Slow and unresponsive thick-oxide transistors and diodes are avoided.
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Auvinen Stuart T.
Leja Ronald W.
Pericom Semiconductor Corp.
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