Boots – shoes – and leggings
Patent
1985-02-05
1986-12-23
Zache, Raulfe B.
Boots, shoes, and leggings
G06F 946
Patent
active
046316744
ABSTRACT:
In a multi-processor system, a program for reducing processor overhead in the dispatch of available work by shifting the burden of responsibility for checking other processors for readiness to accept the work from the Active processor to the otherwise Idle processor. When a processor runs out of work, instead of loading a Wait State PSW it scans queues of available work. During this scan, the scanning processor runs enabled for interrupt so that it can be responsive to I/O and External Interrupts which typically signal incoming work.
In the practice of the invention, each processor must have its own storage locations which serve as indicators of available work. In the preferred embodiment they reside in isolated cache-lines that are referenced solely by the owning processor except that another processor may update the indicator when it has prepared a unit of work which may (or must) be performed by the owning processor.
On machines with store-in caches, interference of Active processors by Idle processors is minimized by having the inventive program result in cross-interrogations only when an Active processor has readied work for an Idle processor or its about to go Idle itself.
Instructions which require any sort of hardware serialiazation among processors which could impair the performance of active processors are avoided whenever feasible.
REFERENCES:
patent: 4475156 (1984-10-01), Federico et al.
International Business Machines - Corporation
Moore J. Dennis
Zache Raulfe B.
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