Active pullup circuitry for open-drain signals

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S112000, C327S379000

Reexamination Certificate

active

06650174

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to methods and circuitry for increasing communication speeds in systems employing open-drain or open-collector circuitry for driving a signal line, and more particularly methods and circuitry for providing slew rate sensitive, hysteretic, active pullup.
“Open-drain” terminology is used extensively throughout the description which follows. Although “open-drain” may imply the use of field effect transistors, such as MOSFETs, one of skill in the art will recognize that other types of transistors, such as bipolar transistors may be used as well. Thus, it is to be understood that the open-drain terminology is used herein as a matter of convenience, and that the terminology specifically includes open-collector type circuits. Furthermore, it is to be understood that the invention may be practiced using other than MOSFET transistors and that “transistor” specifically includes such other suitable types of transistors.
Open-drain circuitry is commonly used to interconnect electronic devices by way of a common bus or signal line. The Inter-Integrated Circuit bus (I
2
C), the System Management Bus (SMBus), ACCESS.bus, and Apple Desktop Bus (ADB) are a few of the inter-device communication protocols that use an open-drain architecture. Open-drain signals are also used within computer systems for lines that may be driven by more than one source, e.g., an interrupt input of a microprocessor.
A device sends signals on an open-drain signal line by controlling a transistor coupled between the open-drain signal line and ground. Typically the transistor, which is used as a switch, is an N-channel MOSFET, but other types of transistors are also suitable for this purpose. In addition, the transistor may be internal to the device, or the device may have a terminal for controlling an external transistor.
When the device causes the transistor to be ON, the signal line is coupled to ground, causing its voltage to be pulled down to a LOW state or level, e.g., less than about 0.4 volts. Conversely, when all devices cause their corresponding driver transistors to be OFF, the signal line is biased to a HIGH state, e.g., 5 volts, by pullup circuitry connected between the signal line and a power supply rail.
The speed at which signals may be transmitted on an open-drain signal line is dependent on how rapidly the signal line can be cycled between LOW and HIGH levels. Because of parasitic capacitance associated with the signal line, the rate at which it may be switched is determined by how rapidly the parasitic capacitance may be charged and discharged. Other factors being equal, an increase in parasitic capacitance slows the charge and discharge rates, and lowers the maximum signaling rate. Therefore, many open-drain based interconnection standards specify a maximum signal line capacitance, typically a few hundred picofarads, to ensure adequate performance.
Another factor determining the rate at which the parasitic capacitance is charged and discharged is the resistance in the charge and discharge current paths. Since the resistance of an output transistor is typically very small when the transistor is ON, the parasitic capacitance may be discharged very rapidly, and the transition from HIGH to LOW occurs quickly. However, the parasitic capacitance is charged by pullup current provided by some form of pullup circuitry.
In a typical application employing an open-drain signal line, the pullup circuitry is simply a pullup resistor coupled between the signal line and a positive supply rail. Because the resistance of a pullup resistor is typically much larger than the ON resistance of a driver transistor, the rate at which the parasitic capacitance may be charged is much slower than the rate at which it may be discharged. The signal rise time is, therefore, much slower than the signal fall time.
One technique for shortening signal rise time is to use a smaller valued pullup resistor. Using a smaller resistance increases the available pullup current, so that any parasitic capacitance may be charged more quickly when all driver transistors are OFF. However, reducing pullup resistance may have adverse effects on circuit operation.
For example, reducing the value of the pullup resistor increases current flow from V
cc
to ground when a driver transistor is ON. This increased current represents wasted electrical power, which may be an important consideration in low power applications such as battery powered devices. The increased current also increases the voltage drop across the driver transistor, thereby raising the signal line voltage and reducing the noise margin associated with a LOW signal line level.
In view of the foregoing it would, therefore, be desirable to improve data signaling speeds in communication systems employing an open-drain architecture, by reducing the rise time associated with open-drain signals, without compromising noise margin or power efficiency.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to improve data signaling speeds in communication systems employing an open-drain architecture, by reducing the rise time associated with open-drain signals, without compromising noise margin or power efficiency.
These and other objects and advantages of the present invention are realized by methods and circuitry in which pullup current is provided by a variable current source in which the available pullup current is a function of a voltage level on the signal line. In particular, the available pullup current is increased when the signal line voltage indicates that the signal line is not being pulled LOW.
In a first embodiment, the additional pullup current is provided whenever a signal on the signal line exceeds a threshold level. In a preferred embodiment, circuitry is provided to monitor the slew rate (dV/dt) of the signal, and higher pullup current is provided only when the signal exceeds the threshold and the slew rate is positive, such as during a LOW-to-HIGH signal transition.


REFERENCES:
patent: 4779013 (1988-10-01), Tanaka
patent: 5404051 (1995-04-01), Kobayashi
patent: 5598119 (1997-01-01), Thayer et al.
patent: 5812021 (1998-09-01), Ikeda
patent: 5835999 (1998-11-01), Grosspietsch et al.
patent: 5877634 (1999-03-01), Hunley
patent: 5877647 (1999-03-01), Vajapey et al.
patent: 37 38 800 (1989-05-01), None
Benchmarq Microelectronics Inc. et al., “System Management Bus Specification,”Smart Battery System Specifications, Revision 1.0, Feb. 15, 1995, pp. 1-17.
Philips Semiconductors, “The I2C-Bus and How To Use It (including specifications),” Apr. 1995, pp. 1-24.

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