Active pull-up voltage spike reducer

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Patent

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Details

327537, 327538, 327541, 327108, 327333, G02F 110, H03K 300, H03L 500

Patent

active

055259260

ABSTRACT:
An embodiment of the present invention provides a method to reduce a regulated power source voltage spike during operation of a dynamic random access memory by the steps of: providing a voltage spike reducer enabling pulse via a pulse generator circuit responsive to a pulse generator input signal; translating the voltage level of an unregulated power source via a level translation stage during the presence of the voltage spike reducer enabling pulse; amplifying a translated voltage level; and providing a measure of current from the unregulated power supply to the regulated power supply via a current driver stage that is responsive to the amplified translated voltage level translation. The method is realize by in a CMOS active pull-up voltage spike reducing circuit for a semiconductor device comprising: first, second and third potentials for powering the active pull-up voltage spike reducing circuitry; a pulse generator stage responsive to a pulse generator input signal; a level translator stage responsive to an output pulse of the pulse generator circuit; a translated driver stage responsive to an output of the level translator stage; and a current driver stage responsive to said translated driver stage to thereby provide additional current to the third potential.

REFERENCES:
patent: 4663701 (1987-05-01), Stotts
patent: 5136190 (1992-08-01), Chern et al.

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