Active pull-up circuit controlled by a single pull-up clock sign

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307269, 307355, 365202, 365205, 365208, H03K 3356

Patent

active

046926429

ABSTRACT:
An improved active pull-up circuit which can be fabricated with reduced number of elements and operate with a small power consumption.
A first switch is provided between a refresh voltage terminal and a true circuit node to be pulled-up. A second switch controlled by a potential of a complementary circuit node is provided for operatively discharging the charge of a control electrode of the first switch. A pull-up clock is applied via a capacitor to the control electrode of the first switch.

REFERENCES:
patent: 4144590 (1979-03-01), Kitagawa et al.
patent: 4162416 (1979-07-01), Beecham et al.
patent: 4417329 (1983-11-01), Mezawa et al.
patent: 4441171 (1984-04-01), Hoffmann
patent: 4475178 (1984-10-01), Kinoshita
patent: 4504929 (1985-03-01), Takemae et al.
Ellis et al, "Controlled Gate Bit Line Boost Circuit"; IBM Tech. Discl. Bull.; vol. 24, No. 7B, pp. 3820-3822; 12/1981.
Lee et al, "A 80ns 5V-Only Dynamic RAM"; IEEE ISSCC 1979, Digest of Technical Papers.
Taniguchi et al, "Fully Boosted 64K DRAM with Automatic and Self-Refresh"; IEEE JSSC, vol. SC-16, No. 5, pp. 492-498; 10/1981.

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