Radiant energy – Photocells; circuits and apparatus – Photocell controlled circuit
Reexamination Certificate
1999-02-18
2002-05-14
Evans, F. L. (Department: 2877)
Radiant energy
Photocells; circuits and apparatus
Photocell controlled circuit
C348S275000, C348S280000, C348S281000, C348S308000
Reexamination Certificate
active
06388241
ABSTRACT:
FIELD OF THE INVENTION
The present specification relates to active pixel color linear image sensors, and more particularly, to ways of sampling pixel signals in an active pixel color linear image sensor.
BACKGROUND
Color linear image sensors typically has separate linear arrays (red, green, blue) arranged in parallel on a single sensor bar. A sensor may then be constructed to move in a scan direction relative to a color image, generally perpendicular to the direction of the arrays. The photosensors in each array are provided with a filter thereon of the associated primary color (e.g. red, green, blue). As the sensor bar including the three rows of photosensors moves along the original image, each portion of the area of the original image is exposed to each of the rows of the photosensors. As each filtered row of photosensors moves past each particular area in the original image, signals according to the different primary color separations of that area are output by the particular photosensors in each row. In this way, three separate sets of signals, each relating to one primary color, will be produced by the arrays of photosensors.
Conventional color linear image sensor technology is mainly of the change coupled device (CCD) type. A CCD reads out a pixel signal by transferring the charge collected under a CCD pixel from one analog shift register to another. By virtue of this repeated lateral transfer, charge transfer efficiency needs to be extremely high to obtain low charge loss. Consequently, a specialized fabrication process must be used to produce a high quality CCD. Generally, such specialized fabrication processes are not CMOS compatible. Hence, CCDs typically suffer from major power dissipation. U.S. Pat. No. 5,841,126, titled, “CMOS Active Pixel Sensor Type Imaging System On a Chip”, incorporated herein by reference, describes in detail certain disadvantages of CCDs.
With the advent of CMOS active pixel image sensors and the many advantages that CMOS has to offer (reduction in power dissipation, single chip solution, cost reduction, reliability, etc.), CMOS active pixel sensor technology has begun to replace CCDs as the technology of choice for many imaging applications. Active pixel technology affords a designer the ability to integrate CMOS circuitry and active pixel components on the same silicon substrate—something not done with CCDs. Such integration makes it possible to add functionality to active pixel sensors that would have been either undesirable or impractical to add to a CCD sensor, as will be explained in further detail below. In short, such added functionality makes possible designing a single-chip active-pixel sensor capable of selectively operating in various desirable end-user preferred specifications.
At the present time, active pixel sensors have not been made available as color linear image sensors. It would be desirable therefore to provide active pixel color linear sensors which may be used in place of CCD linear sensors.
As explained above, conventional color linear CCD sensors have an array of readout registers for each linear array of photoimaging elements-Red (R) pixels, Green (G) pixels and (B) Blue pixels for a total of three linear arrays. During imaging, charges are integrated and simultaneously readout into one of three corresponding readout register arrays. The charges in individual readout registers in each same array column are then sequentially clocked. For purposes of this application, such readout method shall be termed the “parallel-packed” pixel readout mode. In parallel-packed readout mode, pixel
1
of each of the R, G, and B imaging arrays is made available (read out) at the same time in response to a trigger signal. Similarly, pixel
2
of each of the R, G, and B imaging arrays are read out simultaneously (in parallel) at the subsequent trigger signal.
FIG. 1
shows a block diagram of a conventional CCD linear sensor
100
comprising a focal plane array system comprised of three (3) linear imaging arrays—R linear pixel array
101
, G linear pixel array
102
and B linear pixel array
103
. Beneath each of linear pixel arrays
101
-
103
are corresponding CCD readout register arrays
104
-
106
. Charges in the pixels (R
1
, R
2
. . . ; G
1
, G
2
. . . ; B
1
,B
2
. . . ) are transferred from the linear pixel arrays
101
-
103
down to their corresponding readout registers when the drivers
107
-
109
are activated. The stored charges underneath the readout registers
104
-
106
are ultimately laterally shifted across through the controlling action of clocks
1
(
110
) and
2
(
111
), in a known manner. Drivers
112
-
114
buffer the shifted pixel signals which then are available for appropriate signal processing as analog outputs Vout-R, Vout-G and Vout-B.
It is typically, though not always, desirable to then convert the analog pixel outputs (Vout-R, Vout-G and Vout-B) into digital bit values. Until now, a preferred way to do this involves multiplexing the analog signals such that each is sequentially (e.g., Vout-R first, followed by Vout-G, and then Vout-B) processed by a “single” Analog-to-Digital Converter (ADC) circuit (not shown). Another method might involve using three separate ADCs to digitize each of the three (R,G,B) streams of analog output signals in parallel. This latter method, however, is less desirable from a system level perspective as it requires additional components. Accordingly, many end-user linear sensor applications have been designed to process a single digital stream of multiplexed R,G,B pixel values. Even in purely analog signal processing environments, however, end-users might prefer to employ a multiplexed (non-parallel) scheme.
FIG. 2
shows the conventional color linear CCD sensor
100
coupled to an off-chip multiplexer circuit
200
provided with off-chip correlated double (CDS) sampling. The Vout-R, Vout-G and Vout-B analog outputs from the CCD linear sensor
100
are connected to respective CDS modules
201
,
202
,
203
. After correlated double sampling is done on the signals, the signals are sequentially selected by multiplexer
204
. The output of multiplexer
104
is buffered by a unity gain amplifier
205
and sent off-chip as a serial analog stream of data.
As mentioned earlier, there are many advantages to integrating additional circuit functionality into a single-chip linear image sensor. Such functionality could include the correlated double sampling and multiplexer module functionality of multiplexer circuit
200
. CMOS active pixel technology makes this more readily possible.
Thus, in providing an active pixel color linear sensor, it would be advantageous to be able to include the necessary multiplexing functionality on-chip so that a system level designer can provide a solution requiring less hardware and yet still realize the traditional functionality of CCD image sensors. Intuitively, one way of implementing a single stream output in an active pixel linear sensor is to multiplex the three signal outputs on-chip such that R pixel
1
is serially output off-chip first, followed by G pixel
1
and then B pixel
1
. The sequence would follow such that R pixel
2
is next, then G pixel
2
, B pixel
2
and so on. For purposes of this application, such readout method shall be termed the “pixel-packed” pixel readout mode.
While the parallel packed and pixel-packed methods of readout are useful to some system level designers of imaging equipment or the like, it could be desirable to have all the stored R pixel charges read out first, followed by the G pixels and then the B pixels. For purposes of this application, this latter readout method shall be termed the “line-packed” pixel readout mode.
At the present, there is no single chip solution that provides off-chip serial stream of pixel data in line-packed form. The most direct approach to reading out the signals in the line-packed readout mode is to have the decoding of the readout registers be such that all the R signals are selected sequentially first followed by all the G pixels and finally by all the B pixels. For linear CCD se
Evans F. L.
Fish & Richardson P.C.
Photobit Corporation
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