Active pixel circuit in CMOS image sensor

Details Active pixel circuit in CMOS image sensor Active pixel circuit in CMOS image sensor

2000-11-28

2003-05-27

Dang, Hung Xuan (Department: 2873)

Radiant energy

Photocells; circuits and apparatus

Photocell controlled circuit

C348S308000

Reexamination Certificate

active

06570144

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a complementary metal oxide semiconductor (CMOS) image sensor, and more particularly to an active pixel circuit in a CMOS image sensor.
2. Background of the Related Art
Electronic products recently put on the market perform multiple functions. For example, a personal computer may include a compact disk-read only memory (CD-ROM) driver and a digital versatile disk (DVD) player, or a camera for video conferences. A digital camera may also be included in such a device to enable editing of a picture via computer. Such a small camera mounted on a notebook computer and a cellular phone will also create new markets and opportunities.
In the case of large-sized products such as a personal computer, a camera may easily be mounted thereon. However, when the camera is mounted on a portable product such as a notebook computer or a cellular phone, serious problems are caused in view of the camera's size and power consumption. Particularly, such problems occur in a video camera using an image pick-up device or sensing element which provides an image by light incident thereon.
Most video cameras need a large power source in addition to a main body containing the sensing element. The reason for this need is that a charge-coupled device (CCD) used as the image pick-up device increases power consumption.
Most conventional CCDs are driven by higher voltages (e.g., +15V, −9V) than the voltage required by CMOS circuits. Since a process for fabricating CCDs is basically similar to a process for forming a bipolar transistor, there is a problem that the cost of the process is higher than the cost of the process for fabricating CMOS circuits.
To solve these problems, a conventional CMOS image sensor has been developed to realize an image pick-up device in a CMOS process which operates at low voltages, reduces power consumption, and reduces costs.
FIG. 1
is a circuit diagram of a 3 transistor pixel design in a related art CMOS image sensor. As shown in
FIG. 1
, the 3 transistor pixel includes a reset transistor
1
for receiving a reset signal at its gate through a reset signal input terminal
2
. One of the electrodes of the reset transistor
1
is connected to a floating node
5
and the other of its electrodes is connected to a VDD terminal
3
. The pixel also includes a selecting transistor
4
having a gate connected to the floating node
5
and one of its electrodes connected to the VDD terminal
3
. An access transistor
7
receives at its gate a row selection signal through a row selection signal input terminal, and one of its electrodes is connected to the selecting transistor
4
in series. The other terminal of the access transistor
7
is connected with a column selection line
9
. The pixel also includes a photodiode
6
between the floating node
5
and a ground terminal
10
.
The sensing operation of the above CMOS image sensor of the 3 transistor pixel will be explained. Charges are accumulated in the photodiode
6
due to externally incident light. The accumulated signal charges change electric potential of the floating node
5
, which is a source terminal of the reset transistor
1
and the gate of the selecting transistor
4
. The selecting transistor
4
is a pixel level source follower. The potential change of the gate of the selecting transistor
4
changes a bias of the drain node of the access transistor
7
and the source terminal of the selecting transistor
4
.
While the signal charges are accumulated in the photodiode
6
, the potential of the source terminals of the reset transistor
1
and the selecting transistor
4
changes. If a row selection signal is applied to the gate of the access transistor
7
through the row selection signal input terminal
8
, the potential difference produced from the photodiode
6
is outputted to the column selection line
9
. After the signal level of the photodiode
6
is detected, the reset transistor
1
is turned on by the reset signal through the reset signal input terminal
2
to reset all the signal charges accumulated in the photodiode
6
.
The CMOS image sensor of the 3 transistor pixel described above generates noise. In an attempt to solve this noise problem, a CMOS image sensor having a 4 transistor pixel design, as shown in
FIG. 2
, has been suggested. The 4 transistor pixel in
FIG. 2
includes a reset transistor
21
for receiving a reset signal at its gate through a reset signal input terminal
22
. One electrode of the reset transistor
21
is connected to a floating node
25
and the other electrode is connected to a VDD terminal
23
. A selecting transistor
24
has its gate connected to the floating node
25
and one electrode connected to the VDD terminal
23
. An access transistor
30
receives a row selection signal at its gate through a row selection signal input terminal
31
, and two electrodes of the access transistor
30
are connected in series between the selecting transistor
24
and a column selection line
32
. A transfer transistor
29
has one electrode connected to the floating node
25
, and its gate is connected to a transfer signal input terminal
28
. The 4 transistor pixel also includes a photodiode
27
for concentrating the accumulated charges its surface and including a photogate
26
for transferring charge between the transfer transistor
29
and a ground terminal
33
.
The sensing operation of the CMOS image sensor of the conventional 4 transistor pixel in
FIG. 2
will be described. First, charges are accumulated in the photodiode
27
due to externally incident light. While the bias of the photogate
26
maintains a high level, the accumulated signal charges concentrate around the surface of the photodiode
27
. When a transfer signal is applied to the gate of the transfer transistor
29
to turn on the transfer transistor
29
, the signal level of the photodiode
27
is transferred to the floating node
25
.
If the reset transistor
21
remains turned off, the signal charges accumulated in the floating node
25
change the potential of the floating node
25
which is also the source terminal of the reset transistor
21
and the gate of the selecting transistor
24
.
The potential change of the gate of the selecting transistor
24
changes the bias of the drain node of the access transistor
30
and the source terminal of the selecting transistor
24
. When the row selection signal is applied to the gate of the access transistor
30
through the row selection signal input terminal
31
, the potential difference by the signal charges produced from the photodiode
27
is outputted to the column selection line
32
. After detecting the signal level by producing the charges of the photodiode
27
, the reset transistor
21
is turned on by the reset signal through the reset signal input terminal
22
to reset all the signal charges on the photodiode
27
.
This process is repeated to read and reset the respective signal level, thereby reading the reference potential. However, the aforementioned related art CMOS image sensors in
FIGS. 1 and 2
have the following problems.
The CMOS image sensor of the 3 transistor design can have an enlarged photodiode (i.e., light-receiving region) to increase its fill factor, but the additional circuitry is required to eliminate noise generated in the signal level. Thus, the size of the pixel becomes increased. Also, because the capacitance of the photodiode in such a design functions as a direct input capacitance, there is a problem that the sensitivity is decreased.
The CMOS image sensor of the 4 transistor design to solve these problems improves an image quality by increasing charge transfer efficiency using CCD technique to control noise and increases the sensitivity by using a floating diffusion node of which input capacitance is small. However, the CMOS image sensor of the 4 transistor design has a problem that its blue response characteristic is poor due to the use of the photogate and the fill factor is also poor. Image lagging may also occur due to t

Affiliated with

Also associated with

Rating

Active pixel circuit in CMOS image sensor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Active pixel circuit in CMOS image sensor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Active pixel circuit in CMOS image sensor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3044465