Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
1999-09-30
2004-06-15
Garber, Wendy R. (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
C348S302000, C348S308000, C348S245000, C257S292000
Reexamination Certificate
active
06750912
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the field of CMOS imagers, and more particularly to a shared output visible imager pixel array.
2. Description of the Related Art
Visible imaging systems implemented in CMOS have the potential for significant reductions in cost and power requirements, as compared to traditional CCD imagers. The prior art describes many alternatives to CCD sensors for generating video or still images. The various schemes can be grouped into two basic classes, passive or active pixel, depending upon whether signal amplification is performed in support circuits or at each pixel. In a passive pixel sensor, pixel simplicity and optical fill factor are maximized. Active-pixel sensors (APS) include an amplifier at each pixel in order to maximize signal transfer and sensitivity, but results in lower optical fill factor.
The simplest passive pixel comprises a photodiode and an access transistor wherein the photo-generated charge is passively transferred from each pixel to downstream circuits. An example of a passive-pixel circuit
10
is shown in FIG.
1
. Numerous pixels (usually at least several hundred) are attached to a common bus line
22
. Each pixel typically comprises a photodiode
16
and an access transistor
14
. A signal from each pixel is read out through its access transistor onto the bus
22
. A downstream amplifier
24
then amplifies the signal. A reset transistor
18
resets the photodiodes. Typically, several hundred such pixel rows are combined to form a visible imager array.
The integrated charge from each photodiode must be transferred, however, with low noise and low non-uniformity. Since each column of pixels often shares a common row or column bus for reading the signal, noise and non-uniformity suppression are typically performed in a “column buffer” servicing each bus.
Subsequent efforts to improve the passive-pixel imager have focused on column buffer improvements. One improvement to the column buffer involves using an enhancement/depletion inverter amplifier to provide reasonably large amplification in a small amount of real estate. However, its sensitivity (40 lux) is still nearly an order of magnitude less than competing CCD sensors. Another improvement both enhanced sensitivity and facilitated automatic gain control via charge amplification in the column buffer. Recently, those in the art have used capacitive transimpedance amplifiers as disclosed in U.S. Pat. No. 5,892,540.
Though much progress has been made in developing passive-pixel imagers, their temporal S/N performance is fundamentally inferior to competing CCD imagers because the large bus capacitance translates to a read noise of approximately 100 e−. CCDs, on the other hand, typically have read noise of 20-40 e− at video frame rates. Nevertheless, the allure of producing imagers in coventional MOS fabrication technologies rather than esoteric CCD processes (which require many implantation steps and complex interface circuitry in the camera) has encouraged the development of active-pixel sensors that can better compete with CCDs.
Active-pixel sensors can provide low read noise comparable or superior to scientific grade CCD systems. An example of a typical active-pixel sensor circuit
30
is shown in
FIG. 2. A
photodiode
32
is directly connected to an amplifier FET
36
in each pixel. A reset FET
34
resets the photodiode and an access FET
38
connects the pixel to an output bus. The active circuit in each pixel of an APS device, however, utilizes cell “real estate” that could otherwise be used to create imagers having optical formats compatible with standard lenses and/or to maximize the sensor optical fill factor for high sensitivity. Active-pixel circuits also may increase power dissipation relative to passive pixel alternatives, increase fixed-pattern noise (possibly requiring additional circuitry to suppress the noise), and limit the scalability of the technology.
In view of the foregoing, it would be desirable to have a CMOS imager combining the high fill factor associated with passive-pixel imagers, with the lower read noise associated with active-pixel designs.
SUMMARY OF THE INVENTION
In general, the present invention combines the active and passive design approaches to form an “active-passive” circuit. The present invention is a shared output visible imager pixel array combining a high optical fill factor with low read noise. A relatively small group of pixels are connected to a relatively short common bus line. An amplifier situated in close proximity to the pixels is connected to the common bus line and shared among the pixels. By reducing the amount of amplifier circuitry associated with each pixel, the optical fill factor is increased. Also, since the bus line is relatively short, the bus capacitance is much lower than in traditional passive pixel designs.
On average, the transistor count per pixel can be less than two, for large arrays. Thus, the present invention is particularly suited for forming high resolution imagers using standard 0.5 &mgr;m CMOS design rules.
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N. Tanaka, S. Hashimoto, M. Shinohara, S. Sugawa, M. Morishita, S. Matsumora, Y. Nakamura and T. Ohm
Kozlowski Lester
Tennant William E.
Tomasini Alfredo
ESS Technology, Inc.
Farjami and Farjami LLP
Garber Wendy R.
Misleh Justin
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