Active optical logic device incorporating a surface-emitting las

Details Active optical logic device incorporating a surface-emitting las Active optical logic device incorporating a surface-emitting las

1994-12-15

1996-07-30

Allen, Stephone B.

Radiant energy

Photocells; circuits and apparatus

Signal isolator

250214LS, 372 50, 377102, G02B 2700

Patent

active

055414435

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION

This invention relates to the field of heterojunction electro-optical devices, and more particularly, to electronic circuits in which a surface-emitting semiconductor diode laser is coupled to a heterojunction phototransistor in order to effect logical operations with optical input and output.


ART BACKGROUND

Recently, much interest has focused on the possibility of parallel optical processing of data by means of large, two-dimensional arrays of active, optical, logic gates. Active, optical devices capable of effecting logical functions such as AND and OR have, in fact been reported. See, for example, W. K. Chart, et at., "Optical AND gates using vertically integrated surface emitting laser-phototransistors," PDP-18, Annual Meeting of the Optical Society of America, 1990, Boston, Mass.; T. Numai, et al., "Surface-emitting laser operation in vertical-to-surface transmission electrophotonic devices with a vertical cavity", Appl. Phys. Lett. 58 (1991) 1250-1252; and G. R. Olbright, et al., "Cascadable laser logic devices: discrete integration of phototransistors with surface-emitting laser diodes", Electron. Lett, 27 (1991) 216-217. However, in the interest of simplicity and versatility, it is advantageous to provide a single logic function which is capable of generating a complete logic family. The AND and OR functions are not complete in that sense.
The NOR logical function does, however, generate a complete logic family. An optical logic device capable of effecting the NOR function has been reported in D. Jie, et al., "Hybrid Optical Bistability and Optical Logic Gates with Avalanche Heterojunction Phototransistor and Semiconductor Laser Diodes", IEEE J. Quantum Electron. QE-23 (1987) 1868-1874. Described in that article is an optical logic gate which relies upon the negative resistance behavior of an avalanche heterojunction phototransistor (AHPT) operated in the avalanche breakdown region. That optical logic gate is an optically bistable device which requires bistable switching. However, bistable modes of operation are: undesirable for at least some applications. Moreover, the AHPT is critically biased because the negative differential resistance region is voltage-sensitive. As a result, such a device is relatively unstable against external power-supply fluctuations. Still further, the phenomenon of "critical slowing down", which has been observed in such hybrid bistable optical devices, is expected to limit the speed of such a device.


SUMMARY OF THE INVENTION

We have discovered a cascadable, active, surface-emitting laser logic device, to be referred to as a SELL device, which can perform the NOR logical operation. The device combines a surface-emitting laser and a heterojunction phototransistor (HPT). The HPT does not need to be operated in the avalanche breakdown region. The laser and HPT are readily integrable in a monolithic device. In contrast to the prior art, the laser and HPT are connected in parallel, and that parallel combination is effectively connected in series with a load resistance. As a result, the voltage drop across the load resistance increases when an input beam of at least a threshold intensity (within the range of wavelengths to which the HPT is responsive) illuminates the HPT. Such voltage drop reduces the current through the laser. If the laser current drops below a threshold level, the laser (which is ON so long as the HPT is not illuminated) is turned OFF. Thus, the SELL device is readily employed as a logical inverter. Moreover, two or more optical input beams may be incident on the HPT. In such a case, the SELL device is readily employed as a NOR gate.


BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic circuit diagram of a SELL device according to the invention.
FIG. 2 represents a monolithic embodiment of the SELL device.
FIG. 3 is a set of I-V curves of an exemplary heterojunction phototransistor (HPT) at various incident optical power levels. The absorbed optical power is estimated to be 44% of the incident optical power.
FIG. 4 shows c

REFERENCES:
patent: 5059788 (1991-10-01), Tashiro et al.
patent: 5233556 (1993-08-01), Matsuda
patent: 5404373 (1995-04-01), Cheng
"Cascadable Laser Logic Devices: Discrete Integration of Phototransistors with Surface-Emitting Laser Diodes", Y. W. Lee, et al., Electronic Letters, Jan. 31, 1991, vol. 27, No. 3, pp. 216-217.
"Active Optical NOR Logic Devices Using Surfaces-Emitting Lasers", Y. H. Lee, et al., IEEE Photonics Technology Letters; No. 5, May 4, 1992, pp. 479-482.

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