Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-04-30
2004-03-16
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C349S059000
Reexamination Certificate
active
06707441
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an active matrix type liquid crystal display device, and a matrix substrate used for this liquid crystal display device.
2. Description of the Related Art
It is known that an active matrix type liquid crystal display device is formed by facing two glass substrates against each other and fixing these, with liquid crystal being sealed in the gap therebetween. A transparent common electrode is formed on one glass substrate, and a great many transparent pixel electrodes are formed in matrix fashion on the other glass substrate, with circuitry also being formed for applying voltage individually to each of the electrodes.
FIG. 22
illustrates a common configuration of such an active matrix type liquid crystal display device, and more specifically is a plan view of the side of the device on which the pixel electrodes have been formed.
This active matrix type liquid crystal display device has a pixel matrix PX (i, j) of m rows and n columns (wherein i=1 to m and j=1 to n), a portion thereof being shown in FIG.
22
. In the Figure, rectangles arrayed vertically and horizontally are represented by broken lines, each representing a pixel.
As shown in the Figure, the pixels are arrayed horizontally (in the column direction) and vertically (in the row direction), with an n number of data lines Dj (j=1 to n) corresponding with each column of these pixels being formed, and further, an m number of gate lines Gi (i=1 to m) corresponding with each column of these pixels are formed. Now, each of the data lines Dj (j=1 to n) are lines for supplying signal voltage to each pixel PX (i, j) (i=1 to m, j=1 to n). Also, each of the gate lines Gi (i=1 to m) are lines for supplying gate voltage to each pixel PX (i, j) (i=1 to m, j=1 to n), for writing the signal voltage to the pixels.
In addition to the above pixel electrode, each pixel PX (i, j) has a TFT (Thin-Film Transistor)
1
. This TFT
1
has the source electrode thereof connected to the data line Dj, the gate electrode connected to the gate line Gi, and the drain electrode connected to the pixel electrode. Now, liquid crystal is sandwiched between the pixel electrode and the above-mentioned common electrode. The capacity
2
shown in
FIG. 22
represents the liquid crystal capacity sandwiched between the pixel electrode and the common electrode. The TFT
1
serves as a switching device for switching between whether or not to write to the pixel, i.e., whether or not to apply the signal voltage supplied via the data line Dj to this liquid crystal capacity
2
.
Next, description will be made regarding the operation of this active matrix type liquid crystal display device. With this active matrix type liquid crystal display device, an m number of gate lines Gi (i=1 to m) are sequentially scanned, and one screen image is displayed for each field cycle. Now, there are two types of methods for scanning gate lines, i.e., interlaced and non-interlaced.
FIG. 23
is an example wherein m=480, and illustrates the scanning order of date lines in the two methods.
With the non-interlaced method, one field cycle is used to sequentially apply gate voltage to the 480 gate lines G
1
through G
480
at a certain time each, following which the same operation is performed each time the field cycle is renewed, as shown in FIG.
23
. Such applying of gate voltage to the gates is performed by an unshown gate driver.
In each field cycle, gate voltage is applied to each gate line G
1
though G
480
once. Now, let us say that gate voltage has been applied to a gate line Gi. The gate voltage is applied to the gate of each TFT
1
of the n number of pixels PX (i, j) (j=1 to n) comprising the No. i row of the pixel matrix, so these TFTs
1
are conducting. Also, during the period wherein gate voltage is being applied to this gate line Gi, n pixels worth of signal voltage is output from unshown data drivers to each of an n number of data lines Dj (j=1 to n). The n pixels worth of signal voltage is applied to each of the liquid crystal capacities
2
of each of the pixels PX (i, j) (j=1 to n) by means of passing though the above conducting TFTs
1
. Consequently, one horizontal scanning line of the image is displayed by the n number of pixels PX (i, j) (j=1 to n). Such applying of date voltage and signal voltage is performed for the first row of the pixel matrix to the 480th thereof, thereby displaying the image for one screen.
Conversely, with the interlaced method, as shown to the right in
FIG. 23
, in a field sequence, gate voltage is applied to the odd-numbered gate lines G
1
, G
3
, G
5
, and so forth through G
479
, for example, following which in the next field sequence, gate voltage is applied to the even-numbered gate lines G
2
, G
4
, G
6
, and so forth through G
480
, i.e., different gate lines are scanned in the field cycles, so the operation of displaying the image for one screen with two field cycles is repeated.
With the interlaced method, each gate line Gi is applied with date voltage only once every two field cycles, and thus is advantageous in that electrical power consumption can be conserved.
Now, the above-described known active matrix type liquid crystal display device has data lines for each column comprising the pixel matrix, so in the event that there is a great number of pixels per row, a great many number of data drivers need to be used, accordingly. However, data drivers are relatively expensive parts, and using a great number of these would make the entire device expensive. For example, a VGA liquid display panel with 1920 pixels in the column direction and 480 pixels in the row direction has 1920 data lines and 480 gate lines. In the event that data drivers and gate drivers having 240 output terminals were used to construct this liquid crystal panel according to the above-described known technique, there is the need to provide eight data drivers in the column direction and two gate drivers in the row direction. Using eight data drivers would make the liquid crystal panel expensive.
Also, the above-described known technique has been problematic in that it has been difficult to construct a liquid crystal display panel with a small display area. That is, a great number of terminals for supplying signal voltage to the above data lines are provided at the data line terminal portion which is the edge portion of the liquid crystal display panel, and this data line terminal portion needs to be reduced in size for a liquid crystal display panel with a small display area. In order for this data line terminal portion to be reduced in size, the pitch of the terminals corresponding to the above data lines must be narrowed, but the liquid crystal panel according to the known technique uses a great number of data lines, so the requirement to narrow this pitch is severely demanding. Accordingly, manufacturing of the data wiring terminal portion is more difficult, which in turn causes problems such as decrease in yield.
SUMMARY OF THE INVENTION
The present invention has been made in light of the above-described problems, and accordingly, it is an object of the present invention to provide an active matrix type liquid crystal display device which can drive each pixel with a fewer number of data lines as compared to the known art, and to provide a substrate used for the same.
The active matrix type liquid crystal display device substrate according to the present invention is arranged such that a plurality of data lines and a plurality of gate lines are provided on a substrate in a matrix form, and that on either side of each of the data lines are provided TFTs and pixel electrodes connecting to the TFTs, corresponding with each of the plurality of gate lines, wherein the plurality of data lines are provided so as to control the pixel electrodes on either side of the data lines, by signals from the corresponding one of the two gate lines on either side of each of the p
Hebiguchi Hiroyuki
Kawahata Ken
Brinks Hofer Gilson & Lione
Hjerpe Richard
LG Philips LCD Co., Ltd.
Nguyen Kevin M.
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