Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
2000-04-18
2004-11-02
Kim, Robert H. (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
C349S038000
Reexamination Certificate
active
06812975
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an active matrix type display provided with a thin film transistor (hereinafter, referred to as a TFT) as a switching device and more particularly to liquid crystal display (hereinafter, referred to as a LCD) which displays an image by driving liquid crystal according to the TFT.
2. Description of the Related Art
A thin film transistor array using amorphous silicon or polycrystal silicon (polysilicon) as an operational semiconductor film is used as a switching device for an active matrix type liquid crystal display panel and the like.
FIG. 6
shows a schematic structure of an array substrate for the conventional liquid crystal display panel using the TFT. FIG.
6
(
a
) shows a plan view of the array substrate and FIG.
6
(
b
) shows a part of a cross section cut at a line A—A in FIG.
6
(
a
). As shown in FIG.
6
(
a
), a plurality of gate wirings
4
are formed on a glass substrate
1
. Further, a plurality of data wirings
6
are formed in the orthogonal direction to the gate wirings
4
. The TFT is formed in a pixel area decided by the gate wirings
4
and the data wirings
6
. According to a structure of the TFT shown in
FIG. 6
, a gate electrode is not formed by being pulled out of the gate wiring
4
, and the TFT is structured to use a part of the gate wiring
4
wired lineally as the gate electrode. Furthermore, this TFT has the so-called double gate structure in which the gate wiring
4
is crossed twice.
In the pixel area, a pixel electrode
7
to be connected to the TFT is formed. Further, a storage capacitor wiring
41
is formed by crossing the pixel area in parallel with the gate wirings
4
and furthermore, a storage capacitor electrode
62
to be electrically connected to the storage capacitor wiring
41
at each pixel area is formed.
Furthermore, as shown in FIG.
6
(
b
), a semiconductor layer
2
made of polysilicon is formed on the glass substrate
1
, and a gate insulating film
3
made of silicon oxide film (SiO
2
) and a gate electrode (gate wiring)
4
made of chrome (Cr) are formed in this order on the semiconductor layer
2
. The semiconductor layer
2
has a channel layer
2
a
, a source electrode
2
c
and a drain electrode
2
b
which are semiconductor layers to which impurity is doped. A first interlayer insulating film
51
is formed substantially on the whole surface of the upper layer of the gate electrode
4
, and a drain electrode
2
f
is connected to the data wiring
6
via a contact hole
51
a
(refer to FIG.
6
(
a
)). A source electrode
2
e
is arranged opposing to the drain electrode
2
f
sandwiching a channel layer
2
g
. The source electrode
2
e
functions as the drain electrode
2
b
in a transistor at next stage. The source electrode
2
c
is arranged opposing to the drain electrode
2
b
while sandwiching the channel layer
2
a
. Also, the source electrode
2
c
and an island-like electrode
61
are connected via a contact hole
51
b
. The island-like electrode
61
is formed simultaneously with a formation of the data wiring
6
made of, for example, Mo (Molybdenum). The island-like electrode
61
is connected to the pixel electrode
7
made of a transparent electrode such as ITO (Indium Tin Oxide) via a contact hole
52
c
in a second interlayer insulating film
52
formed above the island-like electrode
61
.
On the other hand, simultaneously with the formation of the gate electrode
4
, the storage capacitor wiring
41
is formed in parallel with the gate electrode
4
. A storage capacitor electrode
62
is formed on the storage capacitor wiring
41
via a contact hole
51
d
in the first interlayer insulating film
51
. The storage capacitor electrode
62
is formed simultaneously with the formation of the data wiring
6
. The storage capacitor electrode
62
forms a storage capacitor Cs between the pixel electrode
7
and the storage capacitor electrode
62
sandwiching the second interlayer insulating film
52
. It will be noted that, in order to maintain a constant potential, for example, the storage capacitor wiring
41
is electrically connected to a common electrode formed on the opposing substrate side arranged to face the glass substrate
1
. Liquid crystal is sealed between the array substrate where the pixel is formed on the glass substrate and the opposing substrate. When the TFT writes electric charges in a liquid crystal capacitor via the pixel electrode
7
to display an image, the TFT simultaneously writes the electric charges in the storage capacitor. In general, the capacitance which is substantially from the same as the capacitance of liquid crystal to several times as much as the capacitance of liquid crystal is required for the storage capacitor.
FIG. 7
shows other structure of the array substrate for the conventional liquid crystal display panel using the TFT. FIG.
7
(
a
) shows a plan view of the array substrate and FIG.
7
(
b
) shows a part of a cross section cut at a line B—B in FIG.
7
(
a
). As shown in FIG.
7
(
a
), a plurality of gate wirings
4
are formed on the glass substrate
1
. Further, a plurality of data wirings
6
are formed in the orthogonal direction to the gate wirings
4
. The TFT is formed in the pixel area decided by the gate wirings
4
and the data wirings
6
. According to the structure of the TFT shown in
FIG. 7
, a gate electrode is not formed by being pulled out of the gate wiring
4
, and the structure of the TFT is structured to use a part of the gate wiring
4
wired lineally as the gate electrode. Furthermore, this TFT has the so-called double gate structure in which the gate wiring
4
is crossed twice.
In the pixel area, the pixel electrode
7
to be connected to the TFT is formed. Further, a storage capacitor electrode
8
is formed surrounding the circumference of the pixel electrode
7
. This storage capacitor electrode
8
also serves as a black matrix layer (black matrix) normally formed on the opposing substrate side facing the array substrate where the TFT is formed sandwiching a liquid crystal layer.
Furthermore, as shown in FIG.
7
(
b
), the semiconductor layer
2
made of polysilicon is formed on the glass substrate
1
, and the gate insulating film
3
made of silicon oxide film and the gate electrode (gate wiring)
4
made of Cr are formed on the semiconductor layer
2
. The semiconductor layer
2
has a channel layer
2
a
, and a source electrode
2
c
and a drain electrode
2
b
which are semiconductor layers to which impurity is doped. The first interlayer insulating film
51
is formed substantially on the whole surface of the upper layer of the gate electrode
4
, and a drain electrode
2
f
is connected to the data wiring
6
via a contact hole
51
a
(refer to FIG.
7
(
a
)). A source electrode
2
e
is arranged opposing to the drain electrode
2
f
sandwiching a channel layer
2
g
. The source electrode
2
e
functions as a drain electrode
2
b
in a transistor at next stage. The source electrode
2
c
is arranged opposing to the drain electrode
2
b
sandwiching the channel layer
2
a
. Also, the source electrode
2
c
and the island-like electrode
61
are connected via the contact hole
51
b
. The island-like electrode
61
is made of, for example, Mo and formed simultaneously with the formation of the data wiring
6
. The island-like electrode
61
is connected to the pixel electrode
7
made of a transparent electrode such as ITO via a contact hole
53
c
opened in the second interlayer insulating film
52
and a third interlayer insulating film
53
formed above the island-like electrode
61
.
The storage capacitor electrode
8
made of, for example, titanium is formed between the second interlayer insulating film
52
and the third interlayer insulating film
53
. The storage capacitor electrode
8
which also serves as the black matrix layer forms a storage capacitor Cs between the pixel electrode
7
and the storage capacitor electrode
8
sandwiching the third interlayer insulating film
53
. Further, the storage capacitor electrode
8
is connec
Chung David Y.
Fujitsu Display Technologies Corporation
Greer Burns & Crain Ltd.
Kim Robert H.
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