Active matrix panel manufacturing method including TFTS having v

Details Active matrix panel manufacturing method including TFTS having v Active matrix panel manufacturing method including TFTS having v

1997-06-27

1999-09-14

Wilczewski, Mary

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Including integrally formed optical element

438154, 438155, 438163, H01L 21336, H01L 218238, H01L 2184

Patent

active

059535822

ABSTRACT:
In the formation of a thin-film transistor (620) capable of improving the OFF current characteristic, first, all ions (arrow Ion-1) generated from a mixed gas (doping gas) containing 5% PH.sub.3 with the remainder being H.sub.2 gas are implanted to a polycrystalline silicon film (604) at an approximately 80 keV energy level to achieve a P.sup.+ ion dose in the range from 3.times.10.sup.13 /cm.sup.2 to 1.times.10.sup.14 /cm.sup.2 in the process forming low concentration source-drain areas (602, 603). Next, all ions generated from a doping gas of pure hydrogen (arrow Ion-2) are implanted to the low concentration area (604a) at an approximately 20 keV energy level to achieve an H.sup.+ ion dose from 1.times.10.sup.14 /cm.sup.2 to 1.times.10.sup.15 /cm.sup.2. Then, the impurity is activated by heat treatment of the low concentration area (604a) implanted with impurity for approximately one hour at approximately 300.degree. C. in a nitrogen atmosphere.

REFERENCES:
patent: 4002501 (1977-01-01), Tamura
patent: 4562638 (1986-01-01), Schwabe et al.
patent: 4717684 (1988-01-01), Katto et al.
patent: 4806500 (1989-02-01), Scheibe
patent: 5024960 (1991-06-01), Haken
patent: 5141885 (1992-08-01), Yoshida et al.
patent: 5208476 (1993-05-01), Inoue
patent: 5246872 (1993-09-01), Mortensen
patent: 5250931 (1993-10-01), Misawa et al.
patent: 5262344 (1993-11-01), Mistry
patent: 5300443 (1994-04-01), Shimabukuro et al.
patent: 5316960 (1994-05-01), Watanabe et al.
patent: 5323042 (1994-06-01), Matsumoto
patent: 5340756 (1994-08-01), Nagayasu
patent: 5341012 (1994-08-01), Misawa et al.
patent: 5393992 (1995-02-01), Suzuki
patent: 5396084 (1995-03-01), Matsumoto
patent: 5396099 (1995-03-01), Kitajima
patent: 5399514 (1995-03-01), Ichikawa
patent: 5508216 (1996-04-01), Inoue
patent: 5518940 (1996-05-01), Hodate et al.
patent: 5563427 (1996-10-01), Yudasaka et al.
patent: 5674763 (1997-10-01), Sugiura et al.
Wolf et al., Silicon Processing for the VLSI Era, vol. 2-Process Integration; Sunset Beach, CA: Lattice Press, 1990; pp. 66-69 1990.

Affiliated with

Also associated with

Rating

Active matrix panel manufacturing method including TFTS having v does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Active matrix panel manufacturing method including TFTS having v, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Active matrix panel manufacturing method including TFTS having v will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1519496