Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure
Reexamination Certificate
2002-12-30
2004-10-19
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Incoherent light emitter structure
C257S079000, C257S082000
Reexamination Certificate
active
06806504
ABSTRACT:
The present invention claims the benefit of Korean Patent Application No. 2001-0088539 filed in Korea on Dec. 29, 2001, which are hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an organic electroluminescent display device, and more particularly, to an active matrix electroluminescent display devices and a method of fabricating the same.
2. Discussion of the Related Art
Currently, the need for flat panel displays having thin profiles, lightweight, and lower power consumption has increased. Accordingly, various flat panel display (FPD) devices such as liquid crystal display (LCD) devices, plasma display panels (PDPs), field emission display (FED) devices, and electroluminescence display (ELD) devices are being developed now.
Among the many different types of FPD devices, the electro luminescence display (ELD) device is the only one that makes use of electroluminescence phenomenon in which light is generated when an electric field is applied to a fluorescent substance. The electroluminescence display (ELD) devices can be classified into inorganic electroluminescence display (ELD) devices and organic electroluminescent display (ELD) devices depending on what type of source excites carriers in each of the devices. The organic electroluminescent display (ELD) device can display colors within a range of visible wavelengths and has a high brightness and a low action voltage. In addition, since the organic electroluminescence display (ELD) devices are self-luminescent, they have a high contrast ratio and are suitable for ultra-thin type display devices. Moreover, since they have a simple manufacturing process, environmental contamination during manufacturing is relatively low. Furthermore, the organic electro luminescence display (ELD) devices have a few microseconds (&mgr;s) response time so that they are suitable for displaying moving images. The organic electroluminescence display (ELD) devices are not limited by their viewing angle, and are stable under low temperature operating conditions. Accordingly, they can be driven with a relatively low voltage (between 5V and 15V), thereby simplifying manufacturing and design of corresponding driving circuitry.
Structures of the organic electroluminescent display (ELD) devices are similar to the structures of the inorganic electroluminescence display (ELD) devices, but the light-emitting system is different from that of the inorganic electroluminescence display (ELD) devices. For example, the organic electro luminescent display (ELD) devices emit light by a recombination of an electron and a hole, whereby they are often referred to as organic light emitting diodes (OLEDs). In addition, active matrix type systems having a plurality of pixels arranged in a matrix form with a thin film transistor connected thereto has been widely applied to the flat panel display devices. The active matrix type systems are also applied to the organic electroluminescent display (ELD) devices and are commonly referred to as an active matrix organic electroluminescent display (ELD) device.
FIG. 1
is a cross sectional view of an active matrix organic electro luminescent display device according to the related art. In
FIG. 1
, a buffer layer
11
is formed on a substrate
10
, and a first polycrystalline silicon layer having first to third portions
12
a
,
12
b
, and
12
c
and a second polycrystalline silicon layer
13
a
are formed on the buffer layer
11
. The first polycrystalline silicon layer is divided into the first portion
12
a
(i.e., an active region) where impurities are not doped, into the second portion
12
b
(i.e., a drain region), and into the third portion
12
c
(i.e., a source region) where the impurities are doped. The second polycrystalline silicon layer
13
a
functions as a capacitor electrode.
A gate insulation layer
14
is disposed on the active region
12
a
, and a gate electrode
15
is disposed on the gate insulation layer
14
. A first interlayer insulator
16
is formed on the gate insulation layer
14
and the gate electrode
15
, while covering the drain and source regions
12
b
and
12
c
and the second polycrystalline silicon layer
13
a
. A power line
17
is disposed on the first interlayer insulator
16
above the second polycrystalline silicon layer
13
a
. Although not shown, the power line
17
extends along one direction as a line. The power line
17
, the second polycrystalline silicon layer
13
a
, and the first interlayer insulator
16
form a storage capacitor. A second interlayer insulator
18
is formed on the first interlayer insulator
16
to cover the power line
17
.
First and second contact holes
18
a
and
18
b
penetrate both the first and second interlayer insulators
16
and
18
to expose portions of the drain region
12
b
and source region
12
c
, respectively. In addition, a third contact hole
18
c
that penetrates the second interlayer insulator
18
is formed to expose a portion of the power line
17
. A drain electrode
19
a
and a source electrode
19
b
are formed on the second interlayer insulator
18
, whereby the drain electrode
19
a
contacts the drain region
12
b
through the first contact hole
18
a
, and the source electrode
19
b
contacts both the source region
12
c
and the power line
17
through the second contact hole
18
b
and through the third contact hole
18
c
, respectively.
A passivation layer
20
is formed on the drain and source electrodes
19
a
and
19
b
and on the exposed portions of the second interlayer insulator
18
. The passivation layer
20
has a fourth contact hole
20
a
that exposes a portion of the drain electrode
19
a
. A first electrode
21
that is made of a transparent conductive material is disposed on the passivation layer
20
to electrically contact the drain electrode
19
a
through the fourth contact hole
20
a
. A bank layer
22
is formed on the first electrode
21
and on the exposed portions of the passivation layer
20
, and has an opening
22
a
(often referred to as a bank) that exposes a portion of the first electrode
21
. An electroluminescent layer
23
is formed in the bank
22
a
of the bank layer
22
. On the exposed portions of the bank layer
22
and on the electroluminescent layer
23
, a second electrode
24
is formed of an opaque metallic conductive material.
In
FIG. 1
, the first electrode
21
is formed of the transparent conductive material, and the second electrode
24
is formed of the opaque conductive material. Accordingly, the light emitted from the organic electroluminescent layer
23
is released along a bottom direction, which is commonly called a bottom emission-type device.
FIG. 2
is an enlarged cross sectional view of a portion A of
FIG. 1
according to the related art, and
FIG. 3
is a plan view of the enlarged portion A of
FIGS. 1 and 2
according to the related art. In
FIGS. 2 and 3
, the organic electroluminescent layer
23
is generally formed of a high molecular substance, whereby a solvent dissolves the high molecular substance and the dissolved high molecular substance is deposited into the bank opening
22
a
and on the bank layer
22
by an ink-jet technique. Then, the liquid high molecular substance on the bank layer
22
flows into the bank opening
22
a
during a heat treatment process. As a result of the heat treatment process, the organic electroluminescent layer
23
is formed in the bank opening
22
a
, and the solvent and other impurities contained in the liquid high molecular substance are removed. However, since the bank layer
22
is an organic material, such as one of the polyimide groups that have good interface characteristics with the high molecular substance, the electroluminescent layer
23
of the high molecular substance is positioned not only on the first electrode
21
but also on the bank layer
22
around the bank opening
22
a
, especially on side and top surfaces of the bank layer
22
.
To prevent the electroluminescent layer
23
from being formed on the surfaces of the bank layer
22
, a plas
LG.Philips LCD Co. , Ltd.
Morgan & Lewis & Bockius, LLP
Nelms David
Nguyen Thinh T
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