Active matrix organic electroluminescent display device

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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C257S059000, C257S057000

Reexamination Certificate

active

06835954

ABSTRACT:

This application claims the benefit of Korean Patent Application Nos. 2001-0088538 filed on Dec. 29, 2001 and 2002-031045 filed on Jun. 3, 2002, which are hereby incorporated by reference in their entirety for all purposes as if fully set forth herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to organic electroluminescent display devices, and more particularly, to an active matrix electroluminescent display devices having thin film transistors.
2. Discussion of the Related Art
As an information age has been evolved rapidly, a necessity for flat panel display, which has advantages such as thinness, lightweight and lower power consumption, has been increased. Accordingly, various flat panel display (FPD) devices such as liquid crystal display (LCD) devices, plasma display panels (PDPs), field emission display (FED) devices and electroluminescence display (ELD) devices have been researched and developed by now.
Among many kinds of FPD devices, the electroluminescence display (ELD) device makes use of electroluminescence phenomenon in which light is generated when an electric field of certain intensity is applied to a fluorescent substance. The electro luminescence display (ELD) devices can be classified into inorganic electroluminescence display (ELD) device and organic electroluminescent display (ELD) device depending on a source that excites careers. The organic electroluminescent display (ELD) device has drawn attention as a displaying device for natural colors because it can display every color in a range of a visible light and has a high brightness and a low operating voltage.
In addition, because the organic electroluminescence display (ELD) device is a self-luminescent, it has a high contrast ratio and is suitable for an ultra-thin type display device. Moreover, because it has a simple manufacturing process, the degree of environmental contamination is relatively low. Besides, the organic electroluminescence display (ELD) device has a few microseconds (&mgr;s) response time so that it is suitable for displaying moving images. The organic electroluminescence display (ELD) device has no limit in a viewing angle and is stable in low temperature condition. Because it is driven with a relatively low voltage between 5V and 15V, a manufacturing and design of a driving circuit is easy.
A structure of the organic electroluminescent display (ELD) device is similar to that of the inorganic electroluminescence display (ELD) device but a light-emitting theory is different from that of the inorganic electroluminescence display (ELD) device. That is, the organic electroluminescent display (ELD) device emits light by a recombination of an electron and a hole and thus it is often referred to as an organic light emitting diode (OLED).
Recently, active matrix type in which a plurality of pixels is arranged in a matrix form and a thin film transistor is connected thereto has been widely applied to the flat panel display devices. The active matrix type is also applied to the organic electroluminescent display (ELD) device, and this is referred to as an active matrix organic electroluminescent display (ELD) device.
FIG. 1
is an equivalent circuit diagram showing a basic pixel structure of a related art active matrix organic electroluminescent display (ELD) device.
In
FIG. 1
, a pixel of the active matrix organic electroluminescent display device has a switching thin film transistor
4
, a driving thin film transistor
5
, a storage capacitor
6
and a light emitting diode (LED)
7
. The switching thin film transistor
4
and the driving thin film transistor
5
are comprised of p-type polycrystalline silicon thin film transistor. A gate electrode of the switching thin film transistor
4
is connected to the gate line
1
, and a source electrode of the switching thin film transistor
4
is connected to the data line
2
. A drain electrode of the switching thin film transistor
4
is connected to a gate electrode of the driving thin film transistor
5
, and a drain electrode of the driving thin film transistor
5
is connected to an anode electrode of the light emitting diode (LED)
7
. A cathode electrode of the light emitting diode (LED)
7
is grounded. A source electrode of the driving thin film transistor
5
is connected to a power line
3
, and a storage capacitor
6
is connected to the gate electrode and the source electrode of the driving thin film transistor
5
.
In the pixel structure illustrated in
FIG. 1
, if a scanning signal is applied to the gate line
1
, the switching thin film transistor
4
is turned on, and an image signal from the data line
2
is stored into the storage capacitor
6
through the switching thin film transistor
4
. If the image signal is applied to the gate electrode of the driving thin film transistor
5
, the driving thin film transistor
5
is turned on, and thus the light emitting diode (LED)
7
emits light. A luminance of the light emitting diode (LED)
7
is controlled by varying electric current in the light emitting diode (LED)
7
. The storage capacitor
6
keeps a gate voltage of the driving thin film transistor
5
constant while the switching thin film transistor
4
is turned off. That is, because the driving thin film transistor
5
can be driven by a stored voltage in the storage capacitor
6
even when the switch thin film transistor
4
is turned off, the electric current can keep flowing into the light emitting diode (LED)
7
and thus the light emitting diode (LED) emits light until a next image signal comes in.
FIG. 2
is a schematic cross-sectional view of a related art active matrix organic electroluminescent display device.
FIG. 2
illustrates an organic light emitting diode, a storage capacitor and a driving thin film transistor. Moreover, a bottom emission type, in which light is emitted through an anode of a lower electrode, is adopted.
In
FIG. 2
, a buffer layer
11
is formed on a substrate, and then a first polycrystalline silicon layer having first to third portions
12
a
,
12
b
and
12
c
and a second polycrystalline silicon layer
13
a
are formed on the buffer layer
11
. The first polycrystalline silicon layer is divided into the first portion
12
a
(i.e., an active region) where impurities are not doped and the second and third portions
12
b
and
12
c
(i.e., respectively, a drain region and a source region) where the impurities are doped. The second polycrystalline silicon layer
13
a
becomes one of the capacitor electrodes. A gate insulation layer
14
is disposed on the active region
12
a
and a gate electrode
15
is disposed on the gate insulation layer
14
. A first interlayer insulator
16
is formed on the gate electrode
15
and on the gate insulation layer
14
while covering the drain and source regions
12
b
and
12
c
and the second polycrystalline silicon layer
13
a
. A power line
17
is disposed on the first interlayer insulator
16
particularly above the second polycrystalline silicon layer
13
a
(i.e., the capacitor electrode). Although not shown in
FIG. 2
, the power line
17
extends as a line in one direction. The power line
17
and the second polycrystalline silicon layer
13
a
form a storage capacitor with the first interlayer insulator
16
therebetween. On the first interlayer insulator
16
, a second interlayer insulator
18
is formed while covering the power line
17
.
Meanwhile, first and second contact holes
18
a
and
18
b
, which penetrate both the first and second interlayer insulators
16
and
18
, expose the drain region
12
b
and source region
12
c
, respectively. Additionally, a third contact hole
18
c
, which penetrates the second interlayer insulator
18
, is formed and exposes a portion of the power line
17
. A drain electrode
19
a
and a source electrode
19
b
are formed on the second interlayer insulator
18
. The drain electrode
19
a
contacts the drain region
12
b
through the first contact hole
18
a
. The source electrode
19
b
contacts both the source region
12
c
and the power line
17
through the se

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