Active matrix liquid crystal display unit having pixel...

Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal

Reexamination Certificate

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C349S128000, C349S136000

Reexamination Certificate

active

06226058

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to a liquid crystal display unit and, more particularly, to an active matrix liquid crystal display unit having pixel accompanied with an accumulating capacitor varied in width along a gate line.
DESCRIPTION OF THE RELATED ART
The liquid crystal display unit is so compact and has low-power consumption that there is a great demand for the liquid crystal display unit. Research and development efforts have been made for the liquid crystal display unit with an emphasis on a high-resolution sharp-gradation wide-screen liquid crystal display panel. However, the manufacturer encounters various technical problems. When the pixels become smaller, the distance between signal wiring and pixel electrode gets narrower and narrower, and the narrow distance makes the lateral electric field strong around the pixel electrode. The strong electric field undesirably affect the orientation of the liquid crystal. A multi-domain type liquid crystal display unit has a plurality of stable orientations in the pixel, and is expected to achieve a wide view angle. The pixels of the multi-domain type liquid crystal display unit are also getting smaller and smaller, and the unstable orientation caused by the lateral field, again, becomes conspicuous.
An active matrix liquid crystal display unit is equipped with thin film transistors arranged in a matrix, and the thin film transistors selectively address image signals to the pixels. The active matrix type liquid crystal display unit achieves a large contrast ratio, a wide view angle and a quick response in comparison to a simple matrix type liquid crystal display unit, and provides a more attractive display.
In the active matrix liquid crystal display unit, the thin film transistors are connected between data lines and pixel electrodes, and gate lines are selectively connected to the gate electrodes of the thin film transistors. A counter electrode is opposed to the pixel electrodes, and liquid crystal fills the gap between the counter electrode and the pixel electrodes. For this reason, a liquid crystal capacitor is coupled to each of the thin film transistor, and an accumulating capacitor is usually added to each pixel. Each of the pixel electrodes, a part of the counter electrode opposed thereto and a piece of liquid crystal therebetween form a pixel, and pixels form a screen where an image is reproduced.
The gate lines are sequentially changed to an active level, and the active level causes the thin film transistors to sequentially turn on. Image signals representative of variation of luminance on each line of pixels are supplied to the data lines in synchronism with the addressing, and the thin film transistors transfer the image signals from the data lines to the line of pixel electrodes. The image signals differently bias the pixel electrodes with respect to the counter electrode, and are accumulated in the pixels until the next selection. The liquid crystal changes its orientations depending upon the magnitude of the image signals, and reproduce a part of an image represented by the image signals. The pixels of each line store the image signals during a time period called a “frame”, i.e., time period from the previous selection to the present selection. In this way, the image signals are sequentially addressed to the lines of pixels, and the image is reproduced on the screen.
The accumulating capacitance prevents the associated pixel from undesirable change of gradation due to leakage current during the frame, and decreases the feed-through or undesirable potential variation on the pixel electrode due to the parasitic capacitance between the gate electrode and the source node of the associated thin film transistor at the turn-off. The amount of feed-through is varied with the gradation, because the liquid crystal has the dielectric constant anisotropically variable in dependence on the orientation thereof. If the feed-through is too large, dc voltage is applied to the liquid crystal, and the liquid crystal is damaged. Thus, the accumulating capacitor is an important component of the active matrix liquid crystal display unit.
FIG. 1
illustrates a typical example of the pixel associated with a common-storage type accumulating capacitor. As described hereinbefore, a thin film transistor TFT
1
is connected between a data line DL
1
and a liquid crystal capacitor CP
1
, and a gate line ADD
1
is connected to the gate electrode of the thin film transistor TFT
1
. An accumulating capacitor CP
2
is connected in parallel to the liquid crystal capacitor CP
1
.
FIGS. 2 and 3
illustrate the prior art pixel and the common-storage type accumulating capacitor CP
2
. The gate line ADD
1
and an adjacent gate line ADD
2
extend in parallel, and a conductive line CL
1
is provided between the gate lines ADD
1
and ADD
2
. The gate lines ADD
1
/ADD
2
and the conductive line CL
1
are covered with a gate insulating layer
1
a
, and a pixel electrode
1
b
is formed on the gate insulating layer
1
a
in such a manner as to be overlapped with the pixel electrode
1
b
. The data line DL
1
and an adjacent data line DL
2
extend on the gate insulating layer
1
a
. Source and drain regions
2
a
/
2
b
of the thin film transistor TFT
1
project from the pixel electrode
1
b
and the data line DL
1
(see FIG.
2
), and a gate electrode
2
c
projects from the gate line ADD
1
. The source and drain regions
2
a
/
2
b
, the gate insulating layer
1
a
and the gate electrode
2
c
as a whole constitute the thin film transistor TFT
1
. In
FIG. 2
, the gate insulating layer
1
a
is removed, and the conductive line CL
1
is indicated by hatching lines for clearly understanding the layout.
The conductive line CL
1
, the gate insulating layer
1
a
and a part of the pixel electrode
1
b
form in combination the accumulating capacitor CP
2
, and a low potential level equal to that of the counter electrode
1
c
is applied to the conductive line CL
1
. The conductive line CL
1
is on the same level as the gate lines ADD
1
/ADD
2
, and is concurrently patterned together with the gate lines ADD
1
/ADD
2
. However, the conductive line CL
1
does not allow light to pass therethrough, and the prior art pixel encounters a problem in darkness of the pixel.
FIGS. 4
,
5
and
6
illustrate a typical example of the liquid crystal pixel. Firstly, the equivalent circuit of the prior art pixel is described with reference to
FIG. 4. A
gate line ADD
3
and a data line DL
3
are associated with a thin film transistor TFT
2
, and an adjacent gate line and an adjacent data line are labeled with ADD
4
and DL
4
, respectively. The gate line ADD
3
is connected to a gate electrode
2
a
of the thin film transistor TFT
2
, and the data line DL
3
and a liquid crystal capacitor CP
3
are connected to source and drain regions
2
b
and
2
c
of the thin film transistor TFT
2
. The liquid crystal capacitor CP
3
is associated with an accumulating capacitor CP
4
, and the accumulating capacitor CP
4
is connected between the source region
2
b
and the adjacent gate line ADD
4
.
As shown in
FIG. 5
of the drawings, one of the corners of the pixel electrode
3
a
is cut away so as to provide a vacant area for the thin film transistor TFT
2
, and has a projection
3
b
. The gate lines ADD
3
/ADD
4
are placed under the data lines DL
3
/DL
4
and the pixel electrode
3
a
, and a part of the gate line ADD
4
is overlapped with the projection
3
b
. The gate lines ADD
3
/ADD
4
are covered with a gate insulating layer
3
c
, and the pixel electrode
3
a
is opposed through the gate insulating layer
3
c
to the projection
3
b
and a counter electrode
3
d
as shown in FIG.
6
.
Thus, any conductive line CL
1
is not required for the prior art pixel electrode disclosed in Japanese Patent Publication of Unexamined Application No. 59-16685, and the pixel is improved in brightness.
A twisted nematic liquid crystal display unit has a a substrate for the thin film transistors covered with an orientation film and another substrate for color filters also covered wit

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