Active matrix liquid crystal display apparatus with...

Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal

Reexamination Certificate

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C349S043000

Reexamination Certificate

active

06339456

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to an active matrix liquid crystal display apparatus using a TFT (thin film transistor) as a switching element.
The active matrix liquid crystal display apparatus, which has a switching element provided for each pixel, can obtain clear images free from the cross talk in high contrast, because display signals can be selectively applied upon each pixel. It is widely used as the display of a liquid crystal display apparatus for a portable unit such as note type personal computer or the like, considering the features of the light weight, thinner type, and lower power consumption.
FIGS. 7
(
a
) and (
b
) show a plan explanatory view (
FIG. 7
(
a
)) and a sectional explanatory view (
FIG. 7
(
b
)) seen from an arrow mark direction, taken along a line A—A of the plan view (
FIG. 7
(
a
)) in one example of the pixel of the conventional active matrix liquid crystal display apparatus. As shown in the drawings, the pixels are formed, by repeating a step of depositting/paterning, respectively a gate electrode
3
integrated with a scanning line
1
, a gate insulating film
13
, a semiconductor layer
6
, a pixel electrode
7
, a source electrode
4
integrated with a signal line
2
, and a drain electrode
5
on a glass substrate
10
. A common electrode
9
is formed on a counter glass substrate
11
, and is positioned opposite to the glass substrate
10
through the liquid crystal layer
12
. As shown in the plan view (
FIG. 7
(
a
)), a storage capacitance line
8
is positioned parallel to the scanning line
1
, and the storage capacitance is formed between the storage capacitance line
8
and the pixel electrode
7
. the storage capacitance is inserted in parallel to the liquid crystal capacitance to be formed through the liquid crystal layer
12
between the pixel electrode
7
and the common electrode
9
, and controls the leaking current of the TFT in a storage period, and the fluctuations, in the liquid crystal applying voltage, to be caused by forming the capacitance between the pixel electrode
7
and the other electrode. The displaying region is formed by the arrayed connection of pixel of the same configuration as described above.
FIG. 8
is an explanatory view showing an equivalent circuit for an active matrix liquid crystal display apparatus when a TFT is used as a switching element.
FIG. 9
is an explanatory view showing the driving waveform. The principle of the driving will be described briefly. A liquid crystal capacitance
25
is connected with a storage capacitance
24
through the TFT
23
at each intersection point between the signal line
22
and the scanning line
21
. The parasitic capacitance Cgd
26
to be formed between the gate electrode and the drain electrode is added to the TFT. The scanning circuit
32
applies a gate pulse sequentially to the scanning line, and the signal generating circuit
31
outputs one line portion of image signals to the signal line synchronously. The TFT is made to be “ON” while the gate pulses are applied on the scanning line, and there is charged with the electric charge on the pixel capacitance and the storage capacitance in accordance with the image signals to be outputted to the signal line. When the gate pulse moves to the next scanning line, the TFT turns is made to be “OFF”, and the charge accumulated before the gate pulses are applied is retained. As a result, the individual pixel effects the predetermined display independently.
In the active matrix liquid crystal display apparatus using the TFT as the switching element, the capacitance Cgd formed between the gate electrode and the drain electrode is parasitically formed. The Cgd is caused by forming the capacitance when the gate pulse falls, and the shift value &Dgr;V of the pixel electrode potential is expressed by the following equation 1.
Δ



V
=
Cgd
Clc
+
Cs
+
Cgd
×
Δ



Vg
(
equation



1
)
wherein the Cgd is a parasitic capacitance between the gate/drain electrodes, Clc is a liquid crystal capacitance, Cs is an auxiliary capacitance, and &Dgr;Vg is the width of the gate pulse. In this equation, the &Dgr;V can be substantially canceled by adjusting the common electrode potential Vcom when the &Dgr;V is the same among all the pixel elements within the displaying region. But it is difficult to make the &Dgr;V constant within the displaying region because of alignment errors of a step and repeat aligner (hereinafter referred to as stepper) to be used in a photolithography process at the pixel array formation. When the alignment error is caused, the difference is caused in the superposed amount of each layer in the divided exposure region, and the Cgd becomes different between the divided exposure regions. A condition where the &Dgr;V becomes different between the divided exposure regions. As the distribution of the &Dgr;V is reflected as it is in the distribution of the liquid crystal application voltage, thus causing the brilliance difference between the divided exposure regions.
As a solving method of this problem, it is considered to control the fluctuations of the &Dgr;V by increasing the value of the storage capacitance Cs. Since the storage capacitance Cs is formed normally by the metallic film which does not have light transmittance, the pixel aperture ratio is reduced by increasing the size of the metallic film for increasing the value of the storage capacitance Cs. Although the Cgd itself is made smaller by downsizing the TFT, the smaller size of the TFT reduces the driving performance to decrease the degree of the freedom.
An object of the present invention is to provide a liquid crystal display apparatus which can control the brilliance difference among the divided exposure regions to be caused when the alignment error by the stepper is caused without reduction in the pixel aperture, and is superior in the display quality.
A liquid crystal display apparatus of claim
1
of the present invention comprises a first pixel including a gate electrode extended forming a predetermined angle &thgr; to the scanning line;
a drain electrode provided having a portion to be superposed on the gate electrode in a first predetermined region on the signal line side in the gate electrode;
a source electrode provided in a second predetermined region opposite to the drain electrode in the gate electrode;
a second pixel including a gate electrode extended forming the predetermined angle &thgr; to the scanning line;
a source electrode provided having a portion to be superposed on the gate electrode in a third predetermined region on the signal line side in the gate electrode; and
a drain electrode provided in a fourth predetermined region opposite to the source electrode in the gate electrode.
In the liquid crystal display apparatus of the claim
2
of the present invention, the first predetermined region is controlled by the gate electrode and the signal line, the second predetermined region is controlled by the gate electrode and the scanning line, the third predetermined region is controlled by the gate electrode and the signal line, and the fourth predetermined region is controlled by the gate electrode and the scanning line.
The liquid crystal display apparatus of the claim
3
of the present invention, the first pixel and the second pixel are adjacent to each other and the first pixel and the second pixel are positioned by plurality in the arrayed condition.
In a liquid crystal display apparatus of the claim
4
of the present invention, the area of the portion where the gate electrode and the drain electrode are superposed in the first pixel is the same as that of the portion where the gate electrode and the drain electrode are superposed in the second pixel.
In a liquid crystal display apparatus of the claim
5
of the present invention, the value of Cgd in the first pixel is the same as that of the Cgd in the second pixel.
In a liquid crystal display apparatus of the claim
6
of the present invention, the storage capacitance is formed by the pixel

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