Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-07-15
2002-08-06
Lao, Lun-Yi (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S092000, C345S094000, C345S098000, C345S208000, C345S690000
Reexamination Certificate
active
06429841
ABSTRACT:
This application claims the benefit of Korean Patent Application No. P98-32565, filed on Aug. 11, 1998, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an active matrix liquid crystal display, and more particularly to an active matrix liquid crystal display apparatus and method having a flicker compensating function as well as a picture uniformity compensating function.
2. Description of the Related Art
The conventional active matrix liquid crystal display device displays a picture by controlling the light transmissivity of liquid crystal using an electric field. The active matrix liquid crystal display device includes a liquid crystal panel having liquid crystal cells arranged in a matrix pattern between two transparent substrates, and a drive circuit for driving the liquid crystal panel. The liquid crystal panel is provided with picture element (or pixel) electrodes and reference electrodes (i.e., common electrodes) for applying an electrical field to each liquid crystal cell. Each pixel electrode is connected, via the source and drain terminals of thin film transistors (TFTs) used as a switching device, to any one source line. The respective gate terminals of the TFTs are connected to gate lines for allowing a pixel voltage signal to be applied to pixel electrodes for one line.
The liquid crystal panel is classified into a longitudinal electric field system and a horizontal electric field system in accordance with a direction of an electric field applied to the liquid crystal cells. The liquid crystal panel of the longitudinal electric field system allows an electrical field applied to the liquid crystal cells to be generated in a direction perpendicular to the transparent substrate. To this end, in the longitudinal electric field system liquid crystal panel, pixel electrodes and reference electrodes are arranged in each of two transparent substrates in such a manner to be opposite to each other. In this case, the reference electrodes are integrally formed in any one of the two transparent substrates.
On the other hand, the horizontal electric field system liquid crystal panel (commonly known as a in-plane switching mode) allows an electric field applied to liquid crystal cells to be generated in a direction parallel to the transparent substrate. Accordingly, in the horizontal electric field system liquid crystal panel, all the pixel electrodes and reference electrodes are positioned at any one of the two transparent substrates. Such a horizontal electric field system liquid crystal panel additionally requires common voltage lines for commonly applying a reference voltage signal to all the reference electrodes, which has a different length depending upon the position of cells on the liquid crystal panel. These common voltage lines CL are arranged in parallel to gate lines GL as shown in
FIG. 1
or arranged in parallel to source lines SL as shown in FIG.
2
. The liquid crystal panel generates a feedthrough voltage &Dgr;Vp corresponding to a voltage different between a source voltage. (i.e., a reference voltage of common electrode) applied to the source line and liquid crystal cell voltage charged in the liquid crystal cell when a scanning signal drops. This feedthrough voltage &Dgr;Vp is generated by a parasitic capacitance existing between the gate terminal of the TFT and the liquid crystal cell electrode, and the magnitude of which is varied in accordance with a data signal supplied to the liquid crystal panel to thereby cause a flicker. In other words, the feedthrough voltage &Dgr;Vp has a different magnitude depending upon the location of liquid crystal cells.
An example of a liquid crystal display device for overcoming such a disadvantage is disclosed in U.S. Pat. No. 5,583,532 assigned to NEC. The liquid crystal display device described in the above patent is capable of providing a compensation for any one pixel on the liquid crystal panel, but it fails to solve such a problem for the entire liquid crystal panel. In other words, even though a compensation is made on the basis of any one portion of the liquid crystal panel (e.g., the left field), a flicker is still generated at the other portion (e.g., the right field). This is caused by the fact that the magnitude of the generated feedthrough voltage &Dgr;Vp is different, depending upon the position of liquid crystal cells when a same magnitude of source voltage signals are applied to the liquid crystal cells. In addition, the feedthrough voltage &Dgr;Vp is not only influenced by a time difference of a scanning signal applied to the gate terminals of the TFTs, but it is also influenced by a time difference of a reference voltage signal applied to the reference electrodes. Due to this, a flicker and a residual image still remain in the liquid crystal display device. Moreover, the light transmissivity of liquid crystal cells becomes non-uniform due to the feedthrough voltage &Dgr;Vp having a different magnitude depending upon the cells of the liquid crystal panel. As a result, a flicker as well as a residual image appears in a picture displayed on the liquid crystal panel. Further, a picture displayed on the liquid crystal panel is distorted.
Prior to explaining embodiments of the present invention, a cause of problems occurring in the conventional flat display panel device will be described. Each picture element or pixel on the liquid crystal panel has an equivalent circuit as shown in FIG.
3
. In
FIG. 3
, the pixel includes a TFT MN connected among a gate line GL, a source line SL and a reference voltage line CL, and a liquid crystal cell Clc connected between the source terminal of the TFT MN and the reference voltage line CL. In addition, the pixel includes a parasitic capacitance Cgs generated between the source terminal of the TFT MN and the gate line GL, a parasitic resistance Rtft existing between the drain terminal and the source terminal of the TFT MN, and a reference line resistance Rcom existing between the liquid crystal cell Clc and the reference voltage line CL. Herein, the parasitic resistance Rtft is an equivalent resistance when the TFT is off and does not have a constant value.
The liquid crystal cell Clc charges a difference voltage between a source signal voltage on the source line SL and a reference voltage on the reference voltage line CL by means of a scanning signal on the gate line GL, during an interval from a time T
0
when the TFT MN is turned on to a time Toff, as shown in
FIGS. 4A and 4B
. The parasitic capacitance Cgs charges a charge amount Qcgs caused by a difference voltage between a high level gate voltage Vgh and a source voltage on the source line SL, during an interval from a rising edge T
0
of the scanning signal to a time point T
1
when the scanning signal begins to fall, as shown in
FIGS. 4A and 4B
.
During an interval from a time T
1
when the scanning signal begins to fall into a time Toff when the TFT MN is turned off, a part Qt of the charge amount Qcgs charged in the parasitic capacitance Cgs is discharged into the source terminal and the remaining charge amount is re-distributed to the parasitic capacitance Cgs and the liquid crystal cell Clc. At this time, a charge amount Qc incoming from the parasitic capacitance Cgs to the liquid crystal cell Clc influences a cell voltage charged to the liquid crystal cell CIc (or to a source voltage signal). Herein, a sum of the charge amount Qt incoming to the parasitic resistance Rtft of the TFT MN and the charge amount Qc incoming to the liquid crystal cell Clc is constantly maintained independent of the position of pixels if the source voltage signal, a high level voltage and a low level voltage of the scanning signal, and the reference voltage signal are changed in the same condition with respect to all the pixels.
However, as shown in
FIG. 4A
, a delay amount of the scanning signal applied to the gate terminal of the TFT MN is small when the pixel is close to the start point of the gate terminal GL; while it becomes great when the pixel is distant
Lao Lun-Yi
LG. Philips LCD Co. Ltd.
McKenna Long & Aldridge LLP
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