Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source
Reexamination Certificate
1996-03-18
2001-06-12
Lao, Lun-Yi (Department: 2673)
Computer graphics processing and selective visual display system
Display driving control circuitry
Display power source
C345S103000, C345S098000, C345S001300, C713S321000
Reexamination Certificate
active
06246399
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an active matrix liquid crystal display and, more particularly, to an active matrix liquid crystal display consuming less electric power than a conventional display.
2. Description of the Related Art
In an active matrix liquid crystal display, a pixel is disposed at each intersection in a matrix construction. Every pixel is equipped with a switching device. Information about the pixels is represented by turning on and off the switching devices. A liquid crystal is used as a display medium in such a display device. In the present invention, thin-film transistors (TFTs) each having three terminals, i.e., gate, source, and drain, are used as switching devices.
In the present specification, a row of the matrix construction means scanning lines (gate lines) which extend parallel to the row and are connected with the gate electrodes of the TFTs in the row. A column of the matrix construction means signal lines (source lines) which run parallel to the column and are connected with the source (or drain) electrodes of the TFTs in the column. A circuit for driving the scanning lines is referred to as a scanning line driver circuit. A circuit for driving the signal lines is referred to as a signal line driver circuit.
FIG. 2
shows one conventional active matrix liquid crystal display. A signal line driver circuit
21
is mounted at the top and a scanning line driver circuit
22
is mounted on the left side to drive signal lines
23
and scanning lines
24
, respectively. The scanning line driver circuit
22
and the signal line driver circuit
21
receive signals such as clock pulses from a signal-generating circuit such as a clock generator.
A scanning line driver circuit
22
using shift registers
35
as shown in FIG.
3
(
a
) is normally used. Whenever a clock pulse (CL
1
,CL
2
) is entered, the output pulse is shifted by one position. The output pulse is fed to one scanning line
32
via a NAND gate
33
and a buffer circuit
34
. In this way, the scanning lines
32
are successively driven. FIG.
3
(
b
) shows timing charts of the scanning line driver circuit
22
.
In the case of a video graphics array (VGA), each scanning line is scanned in about 31 &mgr;s.
One example of the signal line driver circuit
21
is shown in FIG.
4
. Signal line driver circuits
21
normally use shift registers
41
in the same way as scanning line driver circuits
22
. However, the signal line driver circuit
21
does not directly drive signal lines
44
, unlike a scanning line driver circuit
22
. The output signal from a shift register
41
drives a sampling analog switch
43
via a buffer circuit
42
. The analog video signal
45
is sampled and fed to the signal lines
44
.
In the case of VGA, the ideal sampling time is about 40 nsec. Where the signal line driver circuit
21
is composed of TFTs, the sampling time is set to 320 nsec or 640 nsec, taking account of the performance of the TFTs. In this case, 4-phase or 8-phase clock pulses which are shifted from each other in phase by 40 nsec are used.
Another conventional active matrix liquid crystal display is described in Japanese Patent Laid-Open No. 186281/1992 and shown in FIG.
5
. In this construction, signal lines
50
are divided into plural groups. The signal lines
50
are driven from both ends of the display device. Since the load capacitance and load resistance for signals are halved, it is easy to drive the signal lines
50
.
Examples of commercial products using active matrix liquid crystal displays include notebook computers and portable intelligent terminals. These commercial products are required to be driven by batteries. However, the service time of the existing active matrix liquid crystal display is limited by the amount of electric power consumed by the display. Accordingly, it is important to reduce the electric power consumed by the active matrix liquid crystal display in obtaining a longer service time.
The current worldwide trend is toward saving of resources. Active matrix liquid crystal displays which are considered to be promising next-generation display devices must accomplish lower power consumption.
One conceivable method of reducing the electric power consumption is to reduce the applied voltage or the operating frequency. However, this method deteriorates the performance. Therefore, a method of reducing the electric power consumption while maintaining the performance has been sought for.
In the conventional method described already in connection with
FIG. 5
, the signal line capacitance is halved. Let P
2
be the electric power consumed when signal lines are driven. Let P
1
be the electric power consumed when signal lines are driven by the construction described previously in connection with FIG.
2
. The following relations hold:
P
2
=C
1
/2×V
2
×
f
P
1
/2
where C
1
is the capacitance of the signal lines, V is the amplitude of the signal, and f is the operating frequency.
In this way, the electric power consumed by the configuration shown in
FIG. 5
can be halved compared with the electric power consumed by the configuration shown in FIG.
2
. However, two driver circuits are required to be disposed at opposite ends, respectively, of the display device. Therefore, the total electric power consumed by the driver circuits is doubled compared with the electric power consumed by the driver circuit shown in FIG.
2
. Hence, the electric power consumed is increased accordingly. With respect to the driver circuits, the load is halved. However, each driver circuit must have the same number of stages of shift registers as the stages of shift registers of the driver circuit in the configuration shown in FIG.
2
. Therefore, the electric power for driving the shift registers is doubled. Furthermore, the electric power needed to drive the common clock terminal for applying clock pulses to the shift registers is doubled. In addition, the electric power required to drive the video signal input terminal is doubled. These electric powers are comparable to or greater than the electric power for driving the signal lines.
The method described in the above-cited Japanese Patent Laid-Open No. 186281/1992 was originally developed to drive a large area display. Therefore, this method is a disadvantage in reducing electric power consumption.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an active matrix liquid crystal display having signal lines which create a frame of image on a viewing screen and are divided into upper and lower groups to reduce the electric power consumed by the load capacitance of the signal lines, in the same way as in the conventional configuration shown in FIG.
5
.
We have noticed that when the viewing screen is being scanned successively from top to below, e.g., when the upper half of the screen is being scanned, the driver circuit for the lower half is not required to be driven. Accordingly, the invention provides a means for halting the driver circuit for the lower signal lines or putting this driver circuit on standby. Obviously, when the lower half of the display screen is being scanned, the driver circuit for the upper signal lines is halted or put on standby.
Other objects and features of the invention will appear in the course of the description thereof, which follows.
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Chimura Hidehiko
Koyama Jun
Yamane Yasukuni
Fish & Richardson PC
Lao Lun-Yi
Semiconductor Energy Laboratory Co,. Ltd.
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