Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-08-23
2003-07-08
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S098000, C345S100000
Reexamination Certificate
active
06590556
ABSTRACT:
This invention relates to active matrix display devices, in particular having a pixel configuration using a thin film transistor switching device.
This type of display typically comprises an array of pixels arranged in rows and columns. Each row of pixels shares a row conductor which connects to the gates of the thin film transistors of the pixels in the row. Each column of pixels shares a column conductor, to which pixel drive signals are provided. The signal on the row conductor determines whether the transistor is turned on or off, and when the transistor is turned on, by a high voltage pulse on the row conductor, a signal from the column conductor is allowed to pass on to an area of liquid crystal material, thereby altering the light transmission characteristics of the material. An additional storage capacitor may be provided as part of the pixel configuration to enable a voltage to be maintained on the liquid crystal material even after removal of the row electrode pulse. U.S. Pat. No. 5,130,829, whose contents are incorporated herein by reference, discloses in more detail the construction and driving of examples of such an active matrix display device.
The frame (field) period for active matrix display devices requires a row of pixels to be addressed in a short period of time, and this in turn imposes a requirement on the current driving capabilities of the transistor in order to charge or discharge the liquid crystal material to the desired voltage level. In order to meet these current requirements, the gate voltage supplied to the thin film transistor needs to fluctuate between values separated by approximately 30 volts. For example, the transistor may be turned off by applying a gate voltage of around −10 volts, or even lower, (with respect to the source) whereas a voltage of around 20 volts, or even higher, may be required to bias the transistor sufficiently to provide the required source-drain current to charge or discharge the liquid crystal material sufficiently rapidly.
The requirement for large voltage swings in the row conductors requires the row driver circuitry to be implemented using high voltage components.
The voltages provided on the column conductors typically vary by approximately 10 volts, which represents the difference between the drive signals required to drive the liquid crystal material between white and black states. Various drive schemes have been proposed enabling the voltage swing on the column conductors to be reduced, so that lower voltage components may be used in the column driver circuitry. In the so-called “common electrode drive scheme”, the common electrode, connected to the full liquid crystal material layer, is driven to an oscillating voltage. The so-called “four-level drive scheme” uses more complicated row electrode waveforms in order to reduce the voltage swing on the column conductors, using capacitive coupling effects.
Whilst these drive schemes enable lower voltage components to be used for the column driver circuitry, they each result in more complicated row conductor waveforms, in particular having a plurality of voltage levels. This makes the row driver circuitry more complicated, and has conventionally been achieved by using a plurality of voltage supply circuits to generate the different row electrode voltages.
The invention is concerned with the generation of these row voltages.
According to the invention, there is provided a display device comprising an array of liquid crystal pixels, each pixel comprising a thin film transistor switching device and a liquid crystal cell, the array being arranged in rows and columns, wherein each row of pixels shares a row conductor, which connects to the gates of the thin film transistors of the pixels in the row, and wherein each column of pixels shares a column conductor to which pixel drive signals are provided, wherein row driver circuitry provides row address signals for controlling the switching of the transistors of the pixels of the row, and column address circuitry provides the pixel drive signals, wherein the row address signals comprise a plurality of voltage levels, and wherein the column address circuitry comprises circuitry for generating representations of at least some of the row address voltage levels, and wherein the row address circuitry comprises a conversion circuit for converting the representations into the row address levels.
The invention provides a first section of the row signal generating circuitry in the column address circuitry, and a second section in the row driver circuitry. The row driver circuitry is in any case required to switch high voltages on to the row conductors, so must be implemented using high voltage components. The invention thereby provides an architecture which partitions different sections of the row voltage supply circuitry optimally between the row and column drivers. This enables a simplified power supply to be provided which can be made more power efficient.
Preferably the representations comprise relatively low voltage signals (for example of magnitude less than 10V) and the row address levels comprise relatively high voltage signals (for example of magnitude greater than 10V).
The low voltage section generates equivalents of the voltages used in the row driver to address the display. These are the different voltage levels required by the particular addressing scheme being used, together with the common electrode voltage which may also adopt a number of different levels.
The representations, which comprise the equivalents of the voltages used in the row driver, may comprise digital representations or scaled analogue representations. The conversion circuit will then either comprise digital to analogue conversion circuitry or else analogue amplification circuitry. These representation voltages may be corrected for kickback correction, temperature effects and may allow a brightness control.
The representations may be generated only once for each frame period. The regularity with which the voltages must be regenerated depends upon the amount of leakage from the circuitry used.
The simplification of the power supply enables the row address circuitry to be driven by only two power rails. Thus, the digital to analogue converters or amplifiers may be powered from these two rails, avoiding the need in the row driver circuitry for multiple power sources.
The display device may, for example, be used in a mobile telephone.
The invention also provides a column address circuit and a row address circuit, which are adapted to enable the display device architecture to be implemented.
The invention also provides a method of generating row address signals for an active matrix liquid crystal display device, wherein the row address signals comprise a plurality of voltage levels, the method comprising:
in column address circuitry, generating representations of at least some of the row address levels, the representations comprising relatively low voltage signals,
in row driver circuitry, converting the representations into the relatively high voltage row address levels, and forming the row address signals from the row address levels.
REFERENCES:
patent: 5130829 (1992-07-01), Shannon
patent: 6373419 (2002-04-01), Nakao
patent: 6407732 (2002-06-01), Stiens et al.
patent: 6504522 (2003-01-01), Shiraki et al.
patent: WO9952012 (1999-10-01), None
patent: PCT/EP01/09444 (2002-03-01), None
Bird Neil C.
Hector Jason R.
Hjerpe Richard
Koninklijke Philips Electronics , N.V.
Nguyen Francis
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