Active matrix board having double-layer scan lines and capacity

Optical: systems and elements – Holographic system or element – Using a hologram as an optical element

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359 79, 359 87, 257347, 257390, G02F 1136

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active

052125742

ABSTRACT:
An active matrix board comprises pixel electrodes (9) that are disposed in a matrix fashion on an insulating substrate (1), scan lines (23) which are disposed in a parallel manner between the individual pixel electrodes (9), addition capacity lines (31), and signal lines (11) which intersect the scan lines (23) and the addition capacity lines (31). Each scan line (23) comprises a lower scan line (2) which is discontinuously disposed and an anodizable upper scan line (3) that covers the lower scan line (2) and is continuously disposed. Similarly, each addition capacity line (31) comprises a lower line (29) which is discontinuously disposed and an anodizable upper line (30) that covers the lower line (29) and is continuously disposed. Should a segment of a lower line (2, 29) be eroded during etching, the discontinuous disposition of other segments of the lower line (2, 29) precludes the other segments from being subject to erosion.

REFERENCES:
patent: 4778560 (1988-10-01), Takeda et al.
patent: 4804953 (1989-02-01), Castleberry
patent: 4821092 (1989-04-01), Noguchi
patent: 4938567 (1990-07-01), Chartier
patent: 4990460 (1991-02-01), Moriyama
Proc. 1988 International Display Research Conference IEEE New York 1988, pp. 155-158, US; E. Takeda et al.: "An amorphous Si TFT array with TaOx/SiNx double layered insulator for liquid crystal displays".
SID 88 Digest 1988, pp. 310-313, SID. Los Angeles, US; M. Katayama et al., "High-Resolution Full-Color LCDs Addressed by Double-Layered Gate-Insulator a-Si TFTs"--1988.
Patent Abstracts of Japan vol. 13, No. 212 (P-873) (3560), May 18, 1989; JP-A-0129821 (NEC) Jan. 31, 1989.

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