Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-04-18
2004-11-16
Awad, Amr (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S090000, C345S211000, C349S037000, C349S049000
Reexamination Certificate
active
06819310
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to bistable, reflective Cholesteric displays. More specifically, the present invention relates to active matrix addressed bistable, reflective Cholesteric displays. Advantageously, a corresponding system and method of operation for driving the bistable, reflective Cholesteric displays are also disclosed.
Liquid crystal displays (LCD's) have been widely adapted for use in a number of products such as digital watches and clocks, laptop computers, and information and advertising display signs. LCD's are generally classified according to their drive scheme, e.g., passive matrix LCD's and active matrix LCD's.
With respect to passive matrix LCD's, the display includes a thin layer of liquid crystal material sandwiched between two transparent panels. An electrode array comprising a first set or plurality of parallel oriented electrode segments (row electrode segments) disposed on an inwardly facing side of one panel and a second set or plurality of parallel oriented electrode segments (column electrode segments) which are perpendicular to the row electrode segments disposed on an inwardly facing side of the other panel is provided. The row and column electrode segments are spaced apart by spacer material and the liquid crystal material is filled in the spaced apart region between the panels.
Display picture elements or pixels are defined by regions of liquid crystal material adjacent the intersections of aligned electrodes of the horizontal and vertical electrode segments of the electrode array. Upon application of a suitable electric field, a pixel in a reflective display will assume either a reflective or a non-reflective state. A pixel, pi,j, formed at the overlapping or intersection of the ith row electrode and the jth column electrode is subject to an electric field resulting from the potential difference between a voltage applied to the ith row electrode segment and a voltage applied to the jth column electrode segment.
Recent advances in liquid crystal material research has resulted in the discovery of bistable chiral nematic (also called cholesteric) liquid crystal materials. Cholesteric liquid crystal materials are able to maintain a given state (reflective or nonreflective) without the need for the constant application of an electric field. When data or an image displayed on a display is to be changed, the display driver circuitry will update the display corresponding to the changes.
If the panel furthest from the viewer is painted with a black substrate, a pixel with a low reflectance will appear as a black area to the viewer. If the liquid crystal material has a light color appearance (such as yellow) in its highly reflective state, a pixel in a high reflectance state will appear to the viewer as an iridescent colored area on a black background.
Bistable Cholesteric liquid crystal displays (hereinafter Ch-LCD) have received considerable attention of display designers and manufacturers in recent years for portable applications because of their advantageous optical properties and low power consumption. It will be appreciated that this interest has resulted in the introduction of a significant number of products employed in a wide variety of applications. Moreover, this interest has produced various improvements in bistable, reflective Cholesteric displays in terms of optical properties such as brightness, contrast, and full color.
The most prevalent technique for driving the Ch-LCD is by passive matrix addressing. In that case, display driver circuitry is coupled to the vertical and horizontal electrodes of the electrode array. Operating under the control of a logic and control unit, the display driver circuitry energizes the row and column electrodes with appropriate voltage waveforms such that an appropriate voltage across each pixel is generated. The voltage across a pixel will either cause it to remain in its present state of reflectance or change its state of reflectance. The image generated by the display pixels may be modified by changing the state of selected pixels. In this way, text or image data can be presented for viewing.
In the invention disclosed in U.S. Pat. No. 5,748,277 (the '277 patent), which is entitled “Dynamic Drive Method and Apparatus for a Bistable Liquid Crystal Display,” a method and display driver circuitry for speeding the rate of updating a 1,000 row cholesteric liquid crystal display was disclosed. The '277 patent is incorporated herein in its entirety by reference. An updating time of approximately one second for a 1000 row display was achieved. By simultaneously addressing multiple rows of the display with a pipelining scheme, the overall updating time for the display was kept at one second.
With suitable thresholds, zero voltage bistability enables low cost passive matrix addressing for Ch-LCD. However, the slow material response time and the unique switching scheme required by the bistable display makes it difficult for a Ch-LCD to achieve video rate updates on a large format display. While a significant amount of effort has also been devoted to improving the update speed (in milliseconds (ms)) of the bistable, reflective Cholesteric displays, results to date have been less than optimal, as discussed in greater detail immediately below.
The dynamic and electro-optical responses of a typical, bistable reflective Ch-LCD are illustrated in
FIGS. 1A and 1B
. As shown in
FIG. 1
a
, an AC voltage in the form of pulses varying from 0V to 50V is applied to the display and the reflectance is plotted; in
FIG. 1
b
, reflectance is plotted as a function of time.
Referring to
FIG. 1
a
, the reflectance is initially high, i.e., before any voltage is applied. Upon the application of the voltage pulse, the display is switched into the Homeotropic State and the reflectance becomes very low. Once the voltage pulse is switched off, the reflectance gradually increases to the maximum. The rise time of the display is about 250 ms, as illustrated in
FIG. 1
b
. It will be appreciated that in video applications, this long rise tine will cause unpleasant image ghosting.
It will be noted that the final display reflectance versus the voltage amplitude is shown in
FIG. 1
a
. More specifically, there are two initial (stable) states: the planar (higher reflectance) state and the focal conic (lower reflectance) state. It will also be noted that there are several threshold voltages. When the applied voltage is below V
1
, the display will stay in either of its initial states after the pulse. When the voltage increases from V
1
to V
2
, the reflectance of the initially ON display will decrease to a minimal value. The reflectance of the initially OFF display begins to increase when the voltage is above V
3
′ and the reflectance reaches the maximum when the voltage is above V
4
. The reflectance of the initially ON display begins to increase its reflectance when the voltage is above V
3
and the reflectance reaches the maximum when the voltage is above V
4
′. Therefore, for voltage between V
2
and V
3
, the display is switched to the low Reflectance State regardless of its initial state; for voltage above V
4
, the display is switched to the high reflective state regardless of its initial state. Note that there are regions in the voltage response diagram, such as between V
1
and V
2
, where there exists stable partially reflecting states providing the opportunity for gray scale addressing.
Basic concepts and schemes for passive matrix addressing of a bistable reflective cholesteric display are disclosed in U.S. Pat. No. 5,251,048 and U.S. Pat. No. 5,644,330, which patents are incorporated herein by reference. A basic requirement for passive matrix addressing is that:
[(V
4
−V
3
)/2]>V
1
.
This requirement can be met by adjusting the display process and associated material parameters. However, this requirement also limits the adaptation of certain display configurations, which configurations may have other benefits.
Several drive
Huang Xiao-Yang
Miller, IV Nick Martin
Awad Amr
Manning Ventures, Inc.
Pearne & Gordon LLP
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