Active load for emitter coupled logic gate

Details Active load for emitter coupled logic gate Active load for emitter coupled logic gate

1988-03-28

1989-02-21

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307290, 307443, 307454, 307362, 307358, H03K 19086

Patent

active

048067962

ABSTRACT:
An active load for a CML or ECL logic gate for substantially increasing the speed of the gate comprises a transistor having its base coupled to its collector by a first resistor, and its collector-emitter path coupled in series with a second resistor. This load provides an inductive impedance when the small signal emitter resistance is less than the sum of the resistance of the base and the first resistor, causing a peaking effect resulting in high switching speed.

REFERENCES:
patent: 3501647 (1970-03-01), Di Giacomo
patent: 3509362 (1970-04-01), Bartholomew
patent: 3523194 (1970-04-01), Sheng
patent: 3787737 (1974-01-01), Mukai
patent: 4145623 (1979-03-01), Doucette
patent: 4219744 (1980-08-01), Shinn, II
patent: 4286179 (1981-08-01), Konian
patent: 4609837 (1986-09-01), Yagyuu
Y. H. Chan., "High Speed Current Switch Push-Pull Driver", Oct. 1981, IBM Technical Disclosure Bulletin, vol. 24, No. 5, p. 2635.

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