Active load circuit for low-voltage CMOS voltage gain...

Details Active load circuit for low-voltage CMOS voltage gain... Active load circuit for low-voltage CMOS voltage gain...

2007-03-20

2007-03-20

Mottola, Steven J. (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including differential amplifier

Reexamination Certificate

active

10846082

ABSTRACT:
Provided is an active load circuit of a voltage gain amplifier, which allows a high voltage gain with a low supply voltage operation in high-frequency range. The active load circuit includes a PMOS transistor which is connected between the amplifying unit and a power supply voltage and functions as a load element in a low frequency range; a negative feedback buffering unit which is connected to the gate of the PMOS transistor and functions as a common drain amplifier to stabilize the output voltage of the voltage gain amplifier and drive the voltage gain amplifier at a low voltage; and a capacitor which is connected to the negative feedback buffering unit and compensates for both an impedance and a frequency characteristics when the voltage gain amplifier operates in a high frequency range.

REFERENCES:
patent: 5757230 (1998-05-01), Mangelsdorf
patent: 6114907 (2000-09-01), Sakurai
patent: 2002-157031 (2002-05-01), None
patent: 000061733 (2000-10-01), None
Electronics Letters, May 15, 2003, vol. 39, No. 10, pp. 759-760.
A 270 MHz, 1 V pk-pk, Low-Distortion Variable Gain Amplifier in 0.35 um CMOS process, pp. 307-310.
Electronics Letters, Jun. 22, 2000, vol. 36, No. 13, pp. 1096-1098.

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