Amplifiers – With semiconductor amplifying device – Including current mirror amplifier
Reexamination Certificate
2001-03-02
2002-11-12
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including current mirror amplifier
C330S257000
Reexamination Certificate
active
06480069
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an active load circuit for use in a differential amplifier and the like, and more particularly to an active load circuit for use in a differential amplifier of the input stage of an operational amplifier.
2. Description of the Related Art
As a measure for reducing the current consumption in the circuitry of operational amplifier while widening the output amplitude thereof into the range of power supply voltage (VDD) to assure the capability of output current, an operational amplifier has been proposed which uses MOS transistors for both source and sink of the output stage. This type of operational amplifier attempts to eliminate the limitation of output amplitude in case that the output transistors are made of bipolar type transistor, require not large bias current, which might be needed when the source or sink of the output stage is made of constant current circuit or bipolar transistors, in order to achieve compatibility in the capability of output current and in the lower consumption current.
FIG. 1
shows an operational amplifier
100
in accordance with the Prior Art. This circuit is an example constituted of MOS transistors. For the differential current flowing through active load transistors Tr
101
and Tr
103
in the input differential amplifier stage, a current mirror circuit passes the positive input of differential current from the transistor Tr
101
to a transistor Tr
105
, and then from a transistor Tr
106
to a transistor Tr
108
and another transistor Tr
112
. The current mirror also passes the negative input of differential current from the transistor Tr
103
to a transistor Tr
111
. Then, the voltage developed from the difference in current between the transistor Tr
112
and the transistor Tr
111
may be applied to the gate of an output sink transistor Tr
114
as well as to the gate of a transistor Tr
110
in an output idling current setting circuit, which circuit is formed of transistors Tr
107
, Tr
108
, Tr
109
and Tr
110
. In the output idling current setting circuit, transistors Tr
107
and Tr
109
, and transistors Tr
108
and Tr
110
are of the same types, which may act as a kind of differential circuit. Due to the feedback operation in the system including the operational amplifier
100
, in the constant condition, gate voltages of transistors Tr
110
and Tr
108
may be controlled to be at the same potential and so may drain voltages of the transistors Tr
110
and Tr
108
. The drain of the transistor Tr
108
, hence the drain of the transistor Tr
107
and the drain of the transistor Tr
109
may be at the same potential, which potential may be applied to the gate of an output source transistor Tr
113
.
The gate-source voltage of the output source transistor Tr
113
and the transistor Tr
109
may become equivalent, so that the current in correspondence with the ratio of gate size of the output source transistor Tr
113
to the transistor Tr
109
may be drawn as the output stage bias current for compensating for the cross-over distortion in the output stage. The current level of the transistor Tr
109
in the output idling current setting circuit may be set by the current ratio of the transistor Tr
108
and the transistor Tr
110
with respect to the transistor Tr
106
. By setting this current level to an appropriate value, the bias current flowing through the output stage is suppressed so as to achieve a lower consumption current rate.
However, in the structure of the Prior Art operational amplifier
100
, a number of current mirror circuits may be required, because the source/sink transistors tr
113
and tr
114
in the output stage formed by MOS transistors are biased, by using a current mirror circuit for switching the differential current flowing through the active load transistors Tr
101
and Tr
103
in the input differential amplifier stage. More specifically, a current mirror circuit such as the transistor Tr
101
and the transistor Tr
105
for the differential input current in the positive input, the transistor Tr
103
and the transistor Tr
111
for the differential input current in the negative input, and the transistor Tr
106
and the transistor Tr
112
for setting bias for the transistor Tr
114
for output sink transistor and the like may be required. In such circuits differential pair Tr
102
and Tr
104
and the active load pair Tr
101
and Tr
103
in the input differential amplifier stage, as well as the identity of paired transistors may define the accuracy of the operational amplifier
100
, therefore the difference in the characteristics between these transistors may cause the dispersion of offset in the operational amplifier
100
to be aggravated. In other words, the dispersion factor may be composed of five sets of circuits in total, including three sets of current mirror circuits plus two sets in the input differential amplifier stage, resulting in a problem that the offset dispersion may be enlarged in the architecture of the operational amplifier
100
.
The construction of multi-stage cascading by the current mirror circuits may require a long time for input/output response, resulting in that another problem that the circuitry may not accelerate the response.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above circumstances and to overcome the above problems and has an object to provide an active load circuit, which is suitable for achieving an operational amplifier circuit, which may cope with both output current capability and lower consumption current, with less offset, and may be capable of operating at higher speed in case of transient response.
In order to achieve the foregoing object, the active load circuit in accordance with one aspect of the present invention comprises two current mirror circuits including a first current mirror circuit and a second current mirror circuit, both reference potential connection terminals of the current input transistor in one current mirror circuit and of the current output transistor in another current mirror circuit are paired to route to one end of a first impedance circuit and a second impedance circuit, respectively, then the other end of the first and second impedance circuits are connected to the reference potential.
In the active load circuit as have been described above, when outputting differential output current from the first and second output terminals of the first and second current output transistors in the first and second current mirror circuits in response to the differential input current received at the first and second input terminals of the current input transistors in the first and second current mirror circuits, the differential input current will flow through the first and second impedance circuits, and then the difference in voltage drop in correspondence with the differential component in the differential input current will appear in the first and second impedance circuits, which voltage drop will be applied to the reference voltage connection terminal of the output transistor in the other current mirror circuit.
Only when the differential input current has differential component, the voltage drop in the impedance circuit connected to the circuit having the larger differential component will become larger than the voltage drop in the other impedance circuit, and as the terminal voltage at the reference potential connection terminal of the other output current transistor connected to this impedance circuit will be applied with lower voltage than the terminal voltage of the reference potential connection terminal of the output current transistor of the one impedance circuit, the active load circuit will increase the current driving performance of the output current transistor while decreasing the current driving performance of the output current transistor in the other circuit. Therefore a differential output current amplified to a current rate more than the rate defined by the mirroring ratio in the current mirror circuit may be obtained in correspondence w
Arent Fox Kintner Plotkin & Kahn
Fujitsu Limited
Nguyen Khanh Van
Pascal Robert
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