Active load arrangement

Details Active load arrangement Active load arrangement

2002-06-06

2008-10-28

Pert, Evan (Department: 2826)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Utilizing a three or more electrode solid-state device

C324S520000

Reexamination Certificate

active

07443232

ABSTRACT:
An active load arrangement is used to provide proper output load to an object TO under test. The arrangement Z comprises a voltage_controlled transistor MOSFET having a source S, a gate G and a drain D. The drain D is associated with the gate G and connected to an arrangement input I2associated with an output O1of the object under test. The source S is connected to an arrangement output O2associated with an input I1of the object under test. A feedback arrangement is connected to the source S and the gate G. The feedback arrangement changes phase and amplitude of the gate-to-source voltage by varying frequency in order to obtain low impedance at low frequencies and high impedance at high frequencies.

REFERENCES:
patent: 5047728 (1991-09-01), Bayrums
patent: 5047729 (1991-09-01), Bayrums
patent: 5072199 (1991-12-01), Furlow
patent: 5151669 (1992-09-01), Roques et al.
patent: 5361038 (1994-11-01), Allen et al.
patent: 5394025 (1995-02-01), Pierson
patent: 0528413 (1993-02-01), None
patent: 0528413 (1993-02-01), None
patent: WO 9705695 (1997-02-01), None
patent: WO 9705695 (1997-02-01), None

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