Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2001-05-01
2002-10-22
Nguyen, Matthew (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C363S039000
Reexamination Certificate
active
06469485
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to electrical current harmonics suppression.
2. Description of Prior Art
Mechanical loads, such as Switched Reluctance Machines (SRMs), that operate by chopping a dc electrical current into intermittent pulses generate large amounts of current harmonics, thereby causing heating and other disturbances that negatively affect neighboring devices. Conventionally, passive capacitor-inductor filters have been used to suppress such current harmonics. This conventional approach to current harmonics suppression, however, is associated with drawbacks due to the large size and heavy weight of the necessary capacitors and inductors, particularly in high-power applications. Furthermore, the conventional passive capacitor-inductor filter arrangement must either be designed for or tuned to a particular fundamental frequency of the current harmonics. Because many mechanical loads operate over a range of rpms, resulting in a range of fundamental frequencies for the resulting current harmonics, the conventional passive capacitor-inductor filter arrangement cannot be readily implemented to suppress current harmonics generated by such devices.
SUMMARY OF THE INVENTION
In accordance with the present invention, the above drawbacks of the conventional current harmonics suppression technique are resolved through use of an active filter that monitors current harmonics present in a dc bus and generates a compensating current waveform that is approximately equal-but-opposite in polarity to the monitored current harmonics of the dc bus. The active filter of the present invention generates the compensating current waveform by selectively and repeatedly activating a switch that discharges an energy storage capacitor to inject current into the dc bus and a switch that traps current harmonics from the dc bus via a choke. The frequency at which the active filter of the present invention repeatedly activates the switch to discharge the energy storage capacitor is sufficiently greater than the fundamental frequency of the current harmonics to minimize size of the energy storage capacitor, particularly in high-power applications. Furthermore, because the active filter generates switching signals to repeatedly discharge the energy storage capacitor and trap harmonics current from the dc bus as a function of the monitored current harmonics, the active filter is applicable to a wide range of fundamental frequencies for the current distortion and, thus, is suitable for suppressing current harmonics generated by a variety of load conditions.
According to an embodiment of the present invention, an active filter arrangement for generating a compensating current to suppress current harmonics in a dc bus includes: an energy storage capacitor; a choke (i.e., inductor); a controller; and a switch circuit. The controller receives a current harmonics measurement for the dc bus and outputs switch gating signals to the switch circuit as function of the current harmonics measurement. The switch circuit is operatively connected to the energy storage capacitor to repeatedly discharge the energy storage capacitor based on switch gating signals from the controller to inject current into the dc bus. The switch circuit is also operatively connected to the choke to repeatedly trap current harmonics from the dc bus to ground.
In one implementation, the switch circuit is a half-bridge inverter configuration that includes two switches and two anti-parallel diodes connected to the switches. In this implementation, the output choke is connected between the dc bus and the junction between the first and second switches and the energy storage capacitor is connected between the two ends of the half-bridge inverter. When the first switch is set to an ON state by the filter controller, the energy storage capacitor discharges to inject current into the dc bus. When the second switch is set to an ON state by the filter controller, current harmonics from the dc bus are trapped to ground through the choke. When both the first and second switches are in the OFF state, energy stored in the choke will flow across one of the anti-parallel diodes to charge the energy storage capacitor. The filter controller limits ON durations of the first and second switches in accordance with a switch-timing signal. By using a switch-timing signal that has a high frequency relative to the fundamental frequency of the current harmonics, the filter controller will repeatedly activate the first and second switches during each period of the current harmonics, thereby enabling a relatively small energy storage capacitor to discharge sufficient current during each period of the current harmonics to approximately offset the current harmonics.
In one implementation of the present invention, the filter controller generates the gate switching signals for the first and second switches by comparing a high-frequency dual triangular wave, which serves as the switch-timing signal, with an error signal, which indicates the difference between the current harmonics measurement and the compensating current.
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Patent Abstracts of Japan vol. 14, No. 67 (E-885)—JP 01 286770 A (Toshiba Corp), Nov. 17, 1989 abstract; figures 1, 2.
Cheng Louis
Zhao Qihua
Honeywell International , Inc.
Nguyen Matthew
Palguta Larry J.
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