Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-03-05
2003-03-18
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S030000, C345S033000, C345S036000, C345S044000, C345S045000, C345S055000, C345S204000, C345S211000, C315S169100, C315S169300, C315S169400
Reexamination Certificate
active
06535185
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an active driving circuit for a display panel.
2. Description of the Related Art
Recently, the field of flat displays is rapidly developing. Flat display devices that started to develop based on a liquid crystal display (LCD) have been ahead of a cathode ray tube (CRT) mostly used for several decades in the display field.
Various display devices such as a plasma display panel (PDP), a visual fluorescent display (VFD), a field emission display (FED), a light emitting diode (LED), and electroluminescence (EL) have been recently developed.
A driving method of the above display devices is divided into a passive driving method and an active driving method. The passive driving method is based on a simple matrix while the active driving method is based on a thin film transistor (TFT) LCD.
However, the simple matrix display device is driven by a scan driving method, and scan time that can drive the display device is limited. To obtain desired luminance, a high voltage is required. This gives an adverse effect to life span of the display device.
A driving circuit for the TFT-LCD applies a data line signal and a scan line signal to a liquid crystal panel having a driving circuit arranged in a crossing point of a gate line and data lines, thereby driving each pixel.
Each pixel includes a plurality of TFTs, a memory capacitor, and a display device. The TFTs are connected with the scan line and the data line. The memory capacitor and the display device are respectively connected with common terminals of the TFTs in parallel.
The transistors are used for switching and driving functions in accordance with signals applied from the scan line and the data line, so that a voltage is stored in the capacitor and the display device is driven by the stored voltage.
An active driving circuit for the aforementioned display panel will be described with reference to the accompanying drawings.
FIG. 1
is a diagram showing a related art active driving circuit for a display panel based on two active devices.
As shown in
FIG. 1
, two active devices, PMOS transistors Q
2
and Q
3
are arranged within each pixel.
Meanwhile, a constant positive voltage is applied to the PMOS transistor Q
3
through the data line. In applying a voltage of the data line to a charge storage capacitor Cch within the driving circuit and the PMOS transistor Q
2
, the scan line controls the PMOS transistor Q
3
that acts as a switch.
In more detail, the related art driving circuit includes a PMOS transistor Q
2
connected with a positive power source Vdd, the charge storage capacitor Cch, and a display device such as opto electro luminescence (OEL) to directly drive the OEL. The charge storage capacitor Cch is connected to the positive power source Vdd.
Meanwhile, an anode of the OEL is connected with the driving PMOS transistor Q
2
and its cathode is connected with a negative power source Vss.
The operation of the aforementioned related art active driving circuit for display panel will be described below.
If a gray voltage is applied from the data line, the gray voltage is input to the charge storage capacitor Cch and a control terminal of the driving PMOS transistor Q
2
, i.e., a gate, through the switching PMOS transistor Q
3
.
A current corresponding to a positive voltage of the capacitor Cch is supplied to the OEL through the driving PMOS transistor Q
2
. Brightness of the OEL is controlled by the data line signal.
Meanwhile, the switching PMOS transistor Q
3
is controlled by the scan line signal.
As described above, brightness of each pixel is controlled by a voltage from the data line. Respective pixels constitute one screen.
However, the related art driving circuit for a display panel has several problems.
First, if a deviation occurs in a threshold voltage of the driving PMOS transistor, it is difficult to effectively solve the deviation. Moreover, even if the deviation can be controlled, the deviation should be measured in detail for compensation.
Furthermore, if a deviation occurs in the charge storage capacitor, a problem arises in that it is difficult to solve the deviation.
SUMMARY OF THE INVENTION
To solve the above problems, an object of the present invention is to provide an active driving circuit for a display panel in which a deviation of a threshold voltage can automatically be compensated.
Another object of the present invention is to provide an active driving circuit for a display panel in which a deviation of a threshold voltage of a transistor for driving a display panel can be minimized.
Other object of the present invention is to provide an active driving circuit for a display panel in which a display device can stably be operated.
To achieve the above object, an active driving circuit for a display panel according to one aspect of the present invention includes a first transistor connected with a positive power source and a second transistor constituting a mirror circuit against the first transistor. The second transistor has a common gate terminal together with the first transistor and is turned on by a common gate signal applied to the common gate terminal to supply the positive power source to a display device.
The active driving circuit for a display panel according to the present invention further includes a third transistor, a constant current source, a capacitor, and a fourth transistor. The third transistor sets a saturated threshold voltage for the common gate terminal by allowing the first transistor to act as a diode by a scan line signal. The constant current source supplies a current with a ground one side and controlled by a gray signal of a data line. The fourth transistor is turned on by the scan line signal subsequent to the third transistor and controls a voltage of the common gate terminal corresponding to the controlled current of the constant current source by the scan line signal. The capacitor accumulates charges corresponding to the difference between the positive power source and the common gate voltage.
In the preferred embodiment of the present invention, the first and second transistors constitute a mirror circuit when they are turned on, thereby compensating a deviation of a threshold voltage. The capacitor uniformly accumulates charges in accordance with characteristics of the positive power source and the mirror circuit.
The constant current source supplies the current controlled by the gray signal using a current programming mode to generate a voltage difference in the common gate terminal.
The transistors constituting a mirror circuit are differently fabricated at a constant ratio to control a driving current applied to the display device.
To obtain fast response time and improved luminance, a constant current value is initially applied to the display device, and a voltage control device is used so as not to lower an anode electrode of the display device below a constant voltage.
A driving integrated circuit which includes a constant current source that acts to control a current is additionally provided to compensate a deviation of threshold voltages generated in the transistors.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 6023259 (2000-02-01), Howard et al.
patent: 6091203 (2000-07-01), Kawashima et al.
patent: 6229506 (2001-05-01), Dawson et al.
patent: 1 003 150 (2000-05-01), None
patent: 11282419 (1999-10-01), None
patent: WO 99/48078 (1999-09-01), None
patent: WO 99/65012 (1999-12-01), None
Kim Hak Su
Kwon Oh Kyong
Na Young Sun
Fleshner & Kim LLP
Hjerpe Richard
Lesperance Jean
LG Electronics Inc.
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