Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2011-08-23
2011-08-23
Nguyen, Tuan T (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S230030, C365S233100, C365S233190
Reexamination Certificate
active
08004928
ABSTRACT:
An active driver control circuit for a semiconductor memory apparatus includes an asynchronous decoding unit that can be activated in response to a bank selection signal, when an external command is a read or write command, can generate an enabled read/write enable signal, and when a precharge signal is enabled, disable the enabled read/write enable signal, a synchronous decoding unit that can be activated in response to the bank selection signal, can generate an enabled active enable signal when the external command is an active command, when the external command is a precharge command, can generate the precharge signal, and output the active enable signal and the precharge signal in synchronization with a clock, and an active driver control signal generating unit that can generate an active driver control signal in response to the active enable signal and the read/write enable signal.
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Baker & McKenzie LLP
Hynix / Semiconductor Inc.
Nguyen Tuan T
Reidlinger R Lance
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