Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2001-06-07
2003-01-28
Vu, Bao Q. (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S222000, C363S021120
Reexamination Certificate
active
06512352
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to the field of switching power supplies, and in particular, to a switching voltage regulator module.
2. Description of the Related Art
Advances in integrated circuit (IC) technology often relate to the ever decreasing operating voltages required to operate such circuits. A lower operating voltage may translate into lower costs due to decreases in circuit size and power consumption. Present demands for faster and more efficient data processing have prompted a significant development effort in the area of low-voltage integrated circuits. Currently, low-voltage integrated circuits operating in the three-volt range (e.g., 3.3 V ICs) are highly desirable. The three-volt ICs are gradually replacing the standard five-volt ICs due to their higher speed and higher integration densities.
Moreover, the three-volt ICs consume less power than the traditional five-volt ICs. Thus, in battery operated devices, such as portable telephones and lap-top computers, low-voltage integrated circuits allows the devices to operate proportionally longer than devices requiring higher voltage for operation.
However, the 3.3 V IC represents only a transition to ICs with even lower operating voltages that will not only further improve speed and reduce power consumption, but will also allow direct, single-cell battery consumption. It is expected that the next generation of data processing ICs will be operable at voltages in the 1-3 V range. At the same time, since more devices are integrated on a single processor chip and the processors operate at higher frequencies, microprocessors require aggressive power management. Compared with current processors, which require a current draw around 13 amps, future generation processors will require a current draw in the range of 30-50 amps. The load range may reach 1:100.
Further, as the speed of the ICs increase, they are becoming more dynamic loads to their power supplies. Next generation microprocessors are expected to exhibit current slew rates of 5 A
s. Moreover, the output voltage regulation becomes much tighter (e.g., from 5% to 2%). Voltage regulator modules (VRMs) which feed the microprocessors have to have high efficiency, fast transient response and high power density. These requirements pose serious design challenges.
FIG. 1
is a schematic block diagram of a prior art synchronized buck converter
100
. The circuit
100
is typically used as a VRM to meet the requirements of high efficiency, fast transient response and high power density. In operation, switches S
1
and S
2
turn on and off in complementary fashion. The voltage gain of the buck converter circuit
100
can be described by:
D=V
o
/V
in
(1)
where D is the duty ratio of switch S
1
.
As is well known in the art, the buck converter has a high efficiency and good transient response at around a duty cycle of 0.5. For a 5V input voltage and a 2V output, the duty cycle is 0.4, which is an acceptable duty cycle ratio for achieving high efficiency.
Since future VRMs will be required to provide more power to the microprocessors, the power switch must be able to deal with higher currents, which decreases efficiency. However, in accordance with the power equation, the increased power required by future microprocessors may be achieved by raising the input voltage instead, which allows the input current to be decreased, thereby reducing conduction losses. As such, it is preferable that VRMs have a 12V or higher input voltage. For example, the input voltage can be as high as 19V for notebook computers. According to equation (1), the duty cycle for a conventional synchronized buck converter is as small as 0.1 with a 12V input and a 1.2V output. A drawback of a duty cycle on the order of 0.1 is that the circuit exhibits poor performance in terms of efficiency, voltage regulation and transient response.
A schematic of another conventional buck converter circuit
200
is illustrated in FIG.
2
. This buck converter circuit
200
is well known in the art as a tapped inductor synchronized buck converter. The tapped inductor synchronized buck converter circuit
200
operates from an unregulated supply voltage V
IN
and provides a regulated DC output voltage V
0
at terminal
111
(e.g., 2 volts) for driving load R
L
which, for example, may be a microprocessor, portable or laptop computer or other battery-operated system. Circuit
200
includes power switches S
1
and S
2
, such as a power metal oxide semiconductor field effect transistors (MOSFETS), acting in complementary fashion. Circuit
200
further includes leakage inductor L
k
, coupled windings N
1
and N
2
, and filter capacitor Co.
As is made clear below, those of ordinary skill will recognize that inductor L
k
is not a separate component, but represents the leakage inductance of winding N
1
. Windinns N
1
and N
2
are coupled magnetically, and connected electrically at the tap or common junction to which the second switch is connected.
FIG. 3
illustrates various waveforms associated with circuit
200
. The operation of circuit
200
will be described with reference to certain of the waveforms of FIG.
3
. When switch S
1
turns on during the time interval t
1
to t
2
(see
FIG. 3
a
), a voltage difference, V
in
−V
o
is applied to the coupled inductor windings N
1
and N
2
. The switching current in switch S
1
linearly increases (See
FIG. 3
d
) and the voltage across switch S
2
is the input voltage (see
FIG. 3
f
). The circuit delivers power to the output. At time t
2
, switch S
1
turns off and switch S
2
turns on (see
FIG. 3
b
). The energy stored in winding N
1
is transferred to winding N
2
, and the winding current i
s2
flows through S
2
and linearly decreases (see
FIG. 3
c
). The voltage gain of circuit
200
can be written as:
V
o
/V
in
=D
/[1+(
N
1
/
N
2
)*(1
−D
)] (2)
where D is the duty ratio of switch S
1
. From equation (2) it can be seen that a duty cycle on the order of 0.5 can be realized to achieve high efficiency by properly choosing the turns ratio of the coupled inductors.
One disadvantage of circuit
200
is that a high voltage spike occurs across switch S
1
when S
1
turns off (e.g., at time t
2
, See
FIG. 3
e
) because the leakage energy of winding N
1
cannot be transferred to winding N
2
. The leakage energy in L
k
charges the output capacitance (not shown) of S
1
through conducting switch S
2
which causes a high voltage stress across S
1
. As a result, a high voltage rated MOSFET switch must be used in the circuit
200
which significantly increases the power loss and reduces the efficiency.
It would be desirable to provide a circuit configuration which avoids the necessity of using a high voltage rated MOSFET switch and which recycles the leakage energy of the coupled inductor to further improve circuit efficiency.
SUMMARY OF THE INVENTION
It is, therefore, a primary object of the present invention to provide a circuit so that a low-voltage rated power switch can be used to improve circuit efficiency.
It is another object of the present invention to provide a circuit which recycles the leakage energy of the coupled inductor to further improve circuit efficiency.
It is yet another object of the present invention to provide a circuit which uses as few components as necessary.
In accordance with an embodiment of the present invention, there is provided an active clamp step-down converter circuit with a power switch voltage clamping function including a first switch connected in series with an unregulated DC input source, a second switch coupled at one junction at a midpoint of a coupled winding including a first winding and a second winding, a leakage inductance L
k
associated with one winding of the coupled winding, a shottky diode connected in parallel with the second switch and an active clamp circuit including a clamping capacitor and a third switch, connected in series. The clamp circuit is connected in parallel with the leakage inductance and the fi
Koninklijke Philips Electronics , N.V.
Vu Bao Q.
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