Active circuit protection for switched power supply system

Electrical transmission or interconnection systems – Plural supply circuits or sources – Connecting or disconnecting

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C307S087000

Reexamination Certificate

active

06600239

ABSTRACT:

FIELD OF THE INVENTION
The present invention pertains generally to switched power supplies connected in parallel to a common load, and more particularly to protection logic that protects the switching circuitry and prevents the currently active power supply of a switched power supply system from either reaching a current limit condition or causing a large voltage deviation at the load.
BACKGROUND OF THE INVENTION
In many electronic circuit applications, multiple power supplies are connected in parallel to drive a common load during different times of operation. One application example is a device that implements a standby or “sleep” mode. During standby mode such a device might use a low power DC supply such as a battery or DC—DC converter to power the minimal circuitry required to “awaken” the device, and upon awakening switch to a higher power DC supply that supports the current requirements of the functional circuitry.
In switched power supply systems, switching devices are used to switch different power supplies to actively provide power to a common load. These switching devices are controlled using dedicated control logic that only allows one voltage source to supply power to the common load. In many applications, the load is sensitive to large voltage deviations. Accordingly, it is important to limit the voltage deviation seen at the load even when the source of power is being switched from one power supply to another.
In voltage deviation sensitive loads, the implementation choice of the switching devices becomes important. Switching relays switch too slowly to meet strict voltage deviation limitation requirements when used alone. The switching performance can be improved with the use of very large capacitors; however, this increase the expense and size of the overall system.
Analog switches are also a poor choice for voltage deviation sensitive loads. Analog switches are characterized by a high internal resistance, which can create a voltage drop at the load greater than the allowed voltage deviation during normal operation.
Recently, N-Channel MOSFETs are being used to switch between multiple different power supplies to actively power a common load. In such a switching arrangement, the MOSFETs are connected with their drains tied together at the load and their respective sources connected to the output of their respective power supplies.
As termed herein, when a MOSFET switch associated with a particular power supply is turned OFF to isolate its respective power supply from the load, the respective power supply is referred to as an “isolated power supply”. When the MOSFET switch is turned ON to connect its respective power supply to the load, the respective power supply is referred to herein as an “active power supply”. As will be appreciated by those skilled in the art, in a switched power supply system, all power supplies switchably connected to the load may remain powered ON; accordingly, although an isolated power supply is isolated from the load, it may still supply power at its output.
Due to its construction, an N-Channel MOSFET is characterized by an intrinsic body diode across the source and drain. In particular, the anode of the intrinsic body diode is connected at the source node and the cathode is connected at the drain node. In the MOSFET arrangement just described, wherein the drains of each switching MOSFET are tied together, the cathodes of the intrinsic body diodes in the MOSFETs are tied together. This design configuration creates the appearance of using OR-ing diodes. The voltage source outputs must be within a diode drop (approximately 0.6 volts) of each other because if the output voltage of an isolated power supply is greater than a diode drop of an active power supply, it will forward bias the intrinsic body diode in the isolated power supply's associated MOSFET switch and will also supply power to the load. Accordingly, unless the output voltages of each of the power supplies are within a diode drop of each other, their associated MOSFET switches will not provide isolation even if one MOSFET switch is on and the others are off. In particular, the power supply with an output voltage greater than a diode drop of another power supply will source current to the load even though its MOSFET switch is turned off by the forward bias created by the voltage differential across the intrinsic body diode of its switch.
Even if the output voltages of each switched power supply are within a diode drop of one another, a failure in the active power supply will cause a forward bias of the intrinsic body diode of the isolation switch of the isolated power supply, causing the isolated power supply to supply power directly into the failed power supply. The active power supply may then go into current limit. If the active power supply is allowed to continue to operate in current limit, it may eventually damage the MOSFET switch of the isolated power supply due to excessive power dissipation in its intrinsic body diode.
A need therefore exists for protecting the MOSFET isolation switches in a MOSFET switched power supply system when a failure occurs in one of the power supplies. A need also exists for protecting the remaining non-faulty power supplies to ensure that the remaining power supplies, and therefore the load, remains within specified tolerance limits.
SUMMARY OF THE INVENTION
The present invention solves the problems of the prior art by preventing the active power supply of a switched power supply system from either reaching a current limit condition or causing a large voltage deviation at its output and at the load. The invention protects the switching circuit components from being damaged. The invention also ensures that the system will continue to run without interruption even if a failure occurs in the active power supply that is currently supplying power to the load.
In accordance with the invention, an active protection circuit operates to control the switching of the MOSFET isolation switches. A monitoring circuit operates to sense and turn off the isolation switch of the currently active power supply if it senses reverse current flowing through the switch. Simultaneously, a controller receives indication that the active power supply is out of specification, and actively switches the system voltage source to the other power supply. The controller actively ensures that the isolation switch of the faulty power supply remains off until it determines otherwise.


REFERENCES:
patent: 4492876 (1985-01-01), Colbert et al.
patent: 4788450 (1988-11-01), Wagner
patent: 4812672 (1989-03-01), Cowan et al.
patent: 5598041 (1997-01-01), Willis
patent: 5654859 (1997-08-01), Shi
patent: 5672958 (1997-09-01), Brown et al.
patent: 5686814 (1997-11-01), Wierzbicki
patent: 5739596 (1998-04-01), Takizawa et al.
patent: 5796274 (1998-08-01), Willis et al.
patent: 5945816 (1999-08-01), Marusik
patent: 6420906 (2002-07-01), Kohda
patent: 6462434 (2002-10-01), Winick et al.
patent: 2032662 (1991-10-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Active circuit protection for switched power supply system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Active circuit protection for switched power supply system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Active circuit protection for switched power supply system will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3033903

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.