1995-06-09
1997-03-04
Robertson, David L.
395403, G06F 1300
Patent
active
056088922
ABSTRACT:
An active cache memory for use with microprocessors is disclosed. The cache is external to the microprocessor and forms a second level cache which is novel in that it is capable of performing transfers from external random access memory independently of the microprocessor. The cache also provides the ability to encache misaligned references and to transfer data to the microprocessor in bursts.
REFERENCES:
patent: 5237670 (1993-08-01), Wakerly
Wakerly, Digital Design Principles and Practices (Prentice Hall 1994, 2nd ed.), pp. 640-650.
IDT79R3051 Family Hardware User's Manual, Integrated Device Technology, Inc., 1990, pp. 6-1 through 8-10.
Kane, MIPS RISC Architecture (Prentice-Hall 1988).
Alantec Corporation
Robertson David L.
Shenker Michael
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