Amplifiers – With semiconductor amplifying device – Including differential amplifier
Patent
1994-06-28
1995-08-15
Mullins, James B.
Amplifiers
With semiconductor amplifying device
Including differential amplifier
330253, 330255, H03F 345
Patent
active
054423198
DESCRIPTION:
BRIEF SUMMARY
The invention relates to a biasing circuit for a CMOS operational amplifier comprising at least an input operational amplifier, a source follower stage and an end stage, which input operational amplifier comprises a common stage having a first MOS transistor receiving a first biasing voltage from a biasing circuit, said source follower stage comprising at least a series connection of a second and a third MOS transistor, the gate electrode of the third MOS transistor receiving an output signal from the input operational amplifier and the gate electrode of the second transistor receives a second biasing voltage from the biasing circuit, said end stage comprising at least a series connections of a fourth and a fifth MOS transistor, the gate electrode of the fourth transistor being connected to the output of the source follower stage, said biasing circuit comprising at least a biasing operational amplifier having an inverting input and a non-inverting input, the inverting input being connected to a junction point of a series connection of a diode connected MOS transistor and a current source, the non-inverting input being connected to the output voltage of an inverting circuit comprising at least a series connection of a sixth MOS transistor and a seventh MOS transistor, the gate electrode of the sixth MOS transistor being connected to the output of the biasing operational amplifier, said output also supplying said second biasing voltage.
Such a biasing circuit is known from EP-A-0.123.275. The application of said known measures results in an operational amplifier in which the biasing currents are less dependent on variations of the power voltage. However, in the known circuit the first and second biasing voltages are generated by two independent biasing circuit parts (51, 60). No measures are taken or indicated to match the quiescent currents in both biasing circuit parts eventually resulting in matching problems between the biasing currents in the input operational amplifier and the source follower stage.
The object of the invention is to solve these matching problems from the known circuit in an easy and cost effective way.
Therefore, the biasing circuit defined above is characterized in that the gate electrode of the first MOS transistor receiving the first biasing voltage is directly connected to the junction point of the series connection of the diode connected MOS transistor and the current source. By applying these measures the biasing circuit only has one reference current, being the current defined by the current source, to which all other currents, inclusive of the currents in the CMOS operational amplifier, are related. All possible matching problems are thus solved. Moreover, less components in the biasing circuit are used, since no separate biasing circuit part to generate the first biasing voltage is needed any more, thus reducing costs.
In a further embodiment the biasing circuit according to the invention is characterized in that a first resistor is connected between said second MOS transistor and said third MOS transistor, and a second resistor is connected between said sixth MOS transistor and said seventh MOS transistor. The application of these measures further reduces the dependence on manufacturing variations and supply voltage variations.
In a preferred embodiment the voltage across said first resistor is equal to the voltage across said second resistor.
In a further preferred embodiment the first resistor and/or the second resistor are MOS transistors have a predetermined gate voltage. This results in increased slew rate, increased gain and increased capacitive driving capacity, because the gain of the source follower stage may be made larger than 1.
The invention will be explained hereinafter referring to the drawings in which
FIG. 1 shows a class-AB Miller operational amplifier;
FIG. 2 shows a prior art biasing circuit;
FIG. 3 shows another prior art biasing circuit;
FIG. 4 shows a biasing circuit according to the invention;
FIG. 5 shows an alternative to a part of the biasing circui
REFERENCES:
patent: 5047665 (1991-09-01), Burt
Brehmer et al, "Large Swing CMOS Power Amplifier", IEEE Journal of Solid-State Circuits, vol. SC-18, No. 6, Dec. 1983 pp. 624-629.
Manninger, "ASICs fur die Signalverarbeitung," Electronik, vol. 37, No.6, Mar. 1988, pp. 57, 58, 60-62.
Post Reinder L.
Seesink Petrus H.
Mullins James B.
Sierra Semiconductor B.V.
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