Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2001-01-05
2002-07-09
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S119000, C438S124000, C438S126000, C438S127000
Reexamination Certificate
active
06417026
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a chip device such as a surface acoustic wave device, or the like, face-down mounted on a mount-side substrate (subject mounting substrate) such as a circuit substrate of an electronic appliance, a package substrate having a wiring circuit formed thereon, or the like, and further relates to a method for producing the chip device.
In recent years, a high-density mounting method has become popular, in which bump electrodes (external electrodes) of various chip devices such as an inductor (L device), a capacitor (C device), a resistor (R device), a surface acoustic wave device, etc. as well as a semiconductor device, are face-down mounted on a circuit substrate of an electronic appliance. To attain further reduction in size and weight of electronic appliances in future, there are required a chip device having bump electrodes capable of being smaller-sized, and a method for producing the chip device. The background art will be described below with respect to a surface acoustic wave device recently widely used in a mobile radio communication appliance, a navigation system, etc., by way of example.
FIG. 6
is a sectional view showing a conventional surface acoustic wave device
1
face-down mounted on a circuit substrate
10
as a subject mounting substrate through bump electrodes
2
. An active region
4
having comb-like electrodes
3
is formed on a main mounting surface of the surface acoustic wave device
1
. The comb electrodes
3
are connected to a conductor pattern
11
of the circuit substrate
10
through the bump electrodes
2
via an electrode pattern which is not shown but formed on the main mounting surface of the surface acoustic wave device. Incidentally, the electrode bumps
2
are connected to a ground pattern, or the like, of the surface acoustic wave device as well as the comb electrodes. In this manner, the surface acoustic wave device
1
is face-down mounted by means of ultrasonic bonding or by use of electrically conductive resin, solder, or the like, so that the active region
4
comes face to face with a conductor pattern surface of the circuit substrate
10
.
After face-down mounted on the circuit substrate
10
, the aforementioned surface acoustic wave device
1
as a chip device is generally sealed and protected with a buffer resin
12
such as silicone resin, or the like, for the double purpose of stress relaxation and electrical insulation and with an exterior resin
13
such as epoxy resin, or the like, for the main purpose of mechanical protection and intensification of moisture resistance.
According to the aforementioned method in which the chip device face-down mounted on the circuit substrate is sealed with resin, however, the buffer resin intruded between the chip device and the circuit substrate is expanded because of temperature change, swelling, etc. to destroy small junctions by means of the bump electrodes to thereby worsen reliability. Particularly, the resin intruded between the surface acoustic wave device and the circuit substrate is deposited on a surface of the active region to thereby worsen the performance of the surface acoustic wave device. As shown in
FIGS. 7 and 8
, therefore, a countermeasure to prevent the influx of the resin is attained so that a dam is provided between an upper surface of the circuit substrate and the main mounting surface of the chip device to form a closed space.
FIG. 7
is a plan view showing an example in which not only bump electrodes
2
are provided on the main mounting surface of the surface acoustic wave device
1
but also a dam frame
8
is provided so as to surround the active region
4
.
FIG. 8
is a plan view showing an example in which discontinuous barriers
9
are formed in some important positions between bump electrodes
2
provided on the main mounting surface of the surface acoustic wave device
1
. Incidentally, an example of the aforementioned structure of the surface acoustic wave device can be found in JP-A-5-55303, etc.
To reduce the size of the chip device more greatly to achieve high-density mounting such as high-reliable multi-chip on-board, or the like, however, the following unsolved problems have remained still in the aforementioned background art.
According to the background art, the dam and the bump electrodes were formed separately on the chip device. Accordingly, an area for providing the dam was required on the chip device. Because a width of 1 or several millimeters was required to provide the dam frame or the barriers having a sufficient strength, there was a defect that the resulting shape of the chip device became large.
Further, because the dam and the bump electrodes were formed separately, the respective heights of the dam and the bump electrodes on the chip device became uneven. There was therefore a problem that no closed space could be formed when the chip device was facedown mounted on the circuit substrate.
Of course, the discontinuous barriers cannot prevent the influx of the resin perfectly.
Further, it is necessary to reduce the size of the bump electrodes in order to further reduce the size of the chip device, but the strength of the bump electrodes is weakened if the size of the bump electrodes is reduced.
Generally, according to the aforementioned background art, there has remained a problem that it is impossible to provide any chip device in which high-density mounting can be attained by greater reduction in size of the chip device.
Incidentally, as a further background art, JP-A-9-246905 has proposed a structure in which not only an enclosure wall is provided so as to enclose the active region of the surface acoustic wave device but also an upper space enclosed by the enclosure wall is covered with a cover body. Also in this case, however, the size of the device is increased because bump electrodes are disposed in the outside of the enclosure wall. Furthermore, because the bump electrodes are in positions far from the enclosure wall so as not to be reinforced by the enclosure wall, or the like, the size of the bump electrodes is required to be increased so that the bump electrodes have tolerance to stress at the time of bonding and have a necessary fixation strength. Accordingly, it is difficult to advance the reduction in size of the bump electrodes.
Further, according to the aforementioned background art, it is difficult to make the heights of a plurality of bump electrodes uniform because the plurality of bump electrodes are formed on the main mounting surface by means of bonding or by use of balls, or the like.
SUMMARY OF THE INVENTION
This invention is designed on the basis of such a knowledge that, when the chip device is face-down mounted on the mount-side substrate, it is only required to provide a gap of several micrometers in the minimum between a main mounting surface of a chip device and a mount-side substrate such as a circuit substrate, or the like. That is, it is an object of the present invention to provide a chip device in which both the reduction in size of external electrodes as bump electrodes and the reduction in external size of the chip device can be attained to thereby achieve high-density mounting to solve the aforementioned problems, and a method for producing the chip device.
In order to achieve the above object according to an aspect of the present invention, provided is a chip device in which not only an electrode pattern is provided on a main mounting surface of a base but also external electrodes are provided for face-down mounting, characterized in that at least one electrically insulating layer is provided to be put on at least a part of the main mounting surface so as to remain edge portions which do not cover at least apart of the electrode pattern, so that the external electrodes are connected to the electrode pattern while the external electrodes are in contact with the edge portions of the electrically insulating layer.
In the chip device according to the present invention, the edge portion of the electrically insulating layer put on the main mounting
Gotoh Masashi
Kanazawa Jitsuo
Kuwajima Hajime
Chambliss Alonzo
Chaudhuri Olik
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
TDK Corporation
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