Acknowledge triggered forwarding of external block data response

Details Acknowledge triggered forwarding of external block data response Acknowledge triggered forwarding of external block data response

1995-10-18

1998-11-03

Barry, Esq., Lance Leonard

Excavating

371 31, G06F 1300

Patent

active

058323066

ABSTRACT:
A computer system and method using an acknowledging triggered forwarding mechanism for managing the receipt of an external block data response from an external agent. The mechanism consists of an incoming buffer and control logic. The incoming buffer connects internal memory units, such as a load store unit (LSU), cache, and instruction fetch unit (IFU) to an external agent. An external block data response sent by the external agent is stored in an entry partition in the incoming buffer until the validity of the data can be verified. Control logic connects the incoming buffer and the external agent. An external agent sends an external completion response to the control logic to report the status of the data in the incoming buffer. The data in the incoming buffer is forwarded to the internal memory units only if the control logic receives an acknowledge response from the external agent. If the control logic receives a negative acknowledge or bus error from the external agent, the data is discarded and the error is forwarded to the internal memory units.

REFERENCES:
patent: 3571505 (1971-03-01), Mounts
patent: 4408323 (1983-10-01), Montgomery
patent: 5303302 (1994-04-01), Burrows
patent: 5418781 (1995-05-01), Kaufman et al.
patent: 5463737 (1995-10-01), Saitoh
patent: 5568139 (1996-10-01), Yoon
patent: 5608883 (1997-03-01), Kando et al.

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