Accurate bandgap circuit for a CMOS process without NPN devices

Details Accurate bandgap circuit for a CMOS process without NPN devices Accurate bandgap circuit for a CMOS process without NPN devices

1998-12-14

2001-01-30

Cunningham, Terry D. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

C327S540000

Reexamination Certificate

active

06181196

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates in general to a bandgap circuit and, more particularly, to a simple and accurate bandgap circuit suitable for implementation in an integrated circuit made by a CMOS P-epi process.
BACKGROUND OF THE INVENTION
Bandgap circuits are widely used for the purpose of generating an accurate reference voltage which does not vary with temperature. In a context where PNP and NPN bipolar transistors are readily available, there are known bandgap circuits which are relatively simple and accurate. In the context of an integrated circuit made by a CMOS P-epi process, PNP-type bipolar junction transistors can be fabricated in a manner compatible with the CMOS process and without undue additional expense. However, NPN-type bipolar junction transistors can only be fabricated in a CMOS P-epi process by carrying out extra process steps that add significantly to the complexity and cost of the overall process.
For many applications, cost is a critical factor, and the additional complexity and cost involved with fabricating NPN-type bipolar junction transistors cannot be justified. Therefore, as a practical matter, only field effect transistors and PNP-type bipolar junction transistors are available. A consequence is that bandgap circuits in an integrated circuit made by a CMOS P-epi process are more complex and less accurate than they would be if NPN-type bipolar transistors were readily available.
As to accuracy, bandgap circuits in a CMOS process typically include a pair of bipolar junction transistors or diodes, and an operational amplifier having a differential input stage made with CMOS transistors. The operational amplifier has an output stage with a gain of about ten. The diodes have different areas, and have their cathodes coupled together. Equal currents are caused to flow through the diodes. The anode of each diode is coupled to a respective one of the differential inputs of the operational amplifier.
The ratio of the areas of the diodes is selected so that a difference of the junction voltages across the two diodes, as detected by the differential stage of the operational amplifier, will be approximately 55 mV. The output stage of the operational amplifier has a gain of about ten, so that the operational amplifier outputs a voltage of about 0.55 V. This is then added to a bipolar junction voltage of about 0.7 V, to obtain a bandgap voltage of 1.25 V, which is the output of the bandgap circuit.
The circuitry which generates the voltage of 0.55 V has a temperature coefficient which is equal to but opposite to the temperature coefficient of the circuitry which generates the voltage of 0.7 V. Thus, when one of these voltages increases or decreases in response to a temperature change, the other respectively decreases or increases by an equal amount. Consequently, the sum of these voltages, which is the bandgap voltage, remains the same notwithstanding temperature variations.
Due to process variations, the voltage across each of the bipolar diodes may vary from an expected value by 1 mV, even if the diodes are made on the same chip by the same process and are laid out so as to be cross coupled with each other. In a worse-case scenario, where the variations in the two diodes are additive, the offset in the difference voltage of the differential stage will be about 2mV. When this offset is subjected to a gain of ten in the amplifier portion of the operational amplifier, it will produce an offset of 20 mV in the output of the operational amplifier, or in other words, 0.02 V. This 0.02 V offset or error in the output of the operational amplifier is relatively small in comparison to its intended 0.55 V output.
On the other hand, the CMOS transistors of the differential stage are subject to greater variations as a result of the manufacturing process, and in particular may inject at each of the differential inputs a variation or error of 10 mV, even if they are laid out so as to be cross-coupled with each other. In a worse-case scenario where these variations are additive, the offset in the output of the differential stage will be 20 mV. When subjected to the gain of ten in the amplifier portion, the result will be an offset or error of 0.2 V in the output of the operational amplifier. In comparison to the intended output of 0.55 V, this represents a potential error of approximately 36%, which is significant.
A further consideration is that, to the extent such a bandgap circuit uses PNP-type bipolar junction transistors to implement the two diodes, there is no provision to compensate for the split collector current ratio, which leads to undesirable variations of characteristics as a result of process variations. This is due to the fact that the available PNP-type bipolar junction transistors have a very strong substrate effect and weak lateral action, and the split collector current ratio between the substrate and lateral collectors varies significantly with different current densities. This characteristic has been viewed as preventing the design of an accurate bandgap circuit in a CMOS process lacking NPN bipolar junction transistors.
SUMMARY OF THE INVENTION
From the foregoing, it may be appreciate that a need has arisen for a bandgap circuit which is relatively simple in design, which produces an accurate bandgap voltage independent of temperature variations, and which is free of NPN-type bipolar junction transistors so as to facilitate its use in a CMOS process while avoiding the cost and complexity of additional process steps. According to the present invention, an apparatus is provided to address this need, and involves a CMOS-process integrated circuit which contains a bandgap circuit, the bandgap circuit including a differential portion having bipolar first and second components, having an output, and having first and second inputs that are respectively coupled to the first and second components, the bandgap circuit also including a further portion which is responsive to the output of the differential portion, and which has bipolar third and fourth components that are respectively coupled to the first and second inputs of the differential portion, the further portion being operative to generate a bandgap voltage.


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Article, E. Holle, A CMOS Bandgap Reference with Reduced Offset Sensitivity, presented at Fourteenth European Solid-State Circuits Conference Sep. 21-23, 1988, pp. 206-210.
Article, Mark Pedersen, Peter Metz, A CMOS to 100K ECL Interface Circuit, 1989 IEEE International Solid State Circuits Conference, pp. 226-227.

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