Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices
Patent
1996-07-19
1998-08-25
Williams, Howard L.
Coded data generation or conversion
Analog to or from digital conversion
With particular solid state devices
341153, 323315, H03M 166
Patent
active
057987238
ABSTRACT:
An operational amplifier in a bias voltage generator of a MOS current summing digital to analog converter corrects deviations in output current due to variations in drain to source voltages in current slaves caused by differing output resistances and supply voltages. Matching of MOS current sources uses an operational amplifier feedback circuit to create a controlled turn-on reference voltage used for biasing selected differential current paths so as to eliminate drain to source voltage variations in precisely ratioed current slave MOS transistors. One transistor of each differential current pair is enabled by a corresponding switch coupled to the turn-on reference voltage produced by the operational amplifier. In the preferred embodiment, the switches are CMOS transmission gates enabled by the binary digital input and its complement. Low voltage (3 volts) operation is achieved by having minimum number of stacked transistors between power supply voltages. Reliable current matching allows converter resolution of 10 bits. Due to cascode switching action controlling alternative differential current paths, output current is independent of output resistance. The operational amplifier samples the current bias reference used to bias the binary ratioed slaves and the drain of a current mirror and drives a feedback transistor gate and the enabled differential current paths with the turn-on reference voltage so that the precisely ratioed current slaves have the same drain to source voltage as the reference current transistor. The reference voltages produced are thereby independent of supply voltages and process.
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National Semiconductor Corporation
Williams Howard L.
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