Accumulating multiplication circuit executing a double-precision

Details Accumulating multiplication circuit executing a double-precision Accumulating multiplication circuit executing a double-precision

1993-06-10

1995-10-10

Bowler, Alyssa H.

Boots, shoes, and leggings

364736, 364754, 3642582, 364DIG1, G06F 738

Patent

active

054578043

ABSTRACT:
An accumulating multiplication circuit comprises a multiplication part receiving first and second input data, each composed of "n" bits, so as to output a first 2n-bit data of a partial product of the first and second input data, and a shifter for shifting the "2n-bit" data, which is the subject of the arithmetical operation, rightward by "n" bits. An arithmetical operation part receives the first 2n-bit data and the right-shifted 2n-bit data so as to output a third 2n-bit data. Thus, a double-precision multiplication can be efficiently executed.

REFERENCES:
patent: 4817047 (1989-03-01), Nishitami et al.
patent: 4852037 (1989-07-01), Aoki
patent: 4958312 (1990-09-01), Ang et al.
patent: 5235536 (1993-08-01), Matsubishi et al.
patent: 5285403 (1994-02-01), Quisquater et al.
patent: 5287299 (1994-02-01), Lin

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