Boots – shoes – and leggings
Patent
1995-05-15
1996-10-01
Shah, Alpesh M.
Boots, shoes, and leggings
364736, 364754, 3642328, 364258, 3642582, 364DIG1, G06F 738
Patent
active
055618103
ABSTRACT:
An accumulating multiplication circuit includes a multiplication part receiving first and second input data, each composed of "n" bits, so as to output a first 2n-bit data of a partial product of the first and second input data, and a shifter for shifting the "2n-bit" data, which is the subject of the arithmetical operation, rightward by "n" bits. An arithmetical operation part receives the first 2n-bit data and the right-shifted 2n-bit data so as to output a third 2n-bit data. Thus, a double-precision multiplication can be efficiently executed.
REFERENCES:
patent: 4807175 (1989-02-01), Tokumaru et al.
patent: 4809211 (1989-02-01), Kronlage et al.
patent: 4817047 (1989-03-01), Nishitani et al.
patent: 4852037 (1989-07-01), Aoki
patent: 4958312 (1990-09-01), Ang et al.
patent: 5113363 (1992-05-01), Orsino et al.
patent: 5226003 (1993-07-01), Nagamatsu
patent: 5235536 (1993-08-01), Matsubishi et al.
patent: 5285403 (1994-02-01), Quisquater et al.
patent: 5287299 (1994-02-01), Lin
patent: 5303178 (1994-04-01), Ozaki
patent: 5337268 (1994-08-01), Kojima
patent: 5375078 (1994-12-01), Hrusecky et al.
NEC Corporation
Shah Alpesh M.
LandOfFree
Accumulating multiplication circuit executing a double-precision does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Accumulating multiplication circuit executing a double-precision, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Accumulating multiplication circuit executing a double-precision will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1509696